EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 729

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EP4SE530H40I3

Manufacturer Part Number
EP4SE530H40I3
Description
IC STRATIX IV FPGA 530K 1517HBGA
Manufacturer
Altera
Series
STRATIX® IV Er

Specifications of EP4SE530H40I3

Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
976
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1517-HBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-

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Chapter 2: Transceiver Clocking in Stratix IV Devices
FPGA Fabric-Transceiver Interface Clocking
Figure 2–31. Sixteen Identical Channels Across Four Transceiver Blocks for Example 4
Note to
(1) The red lines represent tx_clkout[12], the blue lines represent tx_clkout[8], the green lines represent tx_clkout[4], and the brown lines
February 2011 Altera Corporation
represent tx_clkout[0].
Figure
2–31:
Channel [15:12]
Channel [11:8]
Channel [7:4]
Channel [3:0]
and Control
and Control
and Control
and Control
TX Data
TX Data
TX Data
TX Data
Logic
Logic
Logic
Logic
Fabric
FPGA
tx_coreclk[15:12]
tx_coreclk[11:8]
tx_coreclk[3:0]
tx_coreclk[7:4]
tx_clkout[0]
tx_clkout[12]
tx_clkout[8]
tx_clkout[8]
tx_clkout[4]
Transceiver Block GXBR2
Transceiver Block GXBR0
Transceiver Block GXBR3
Transceiver Block GXBR1
Channel 3
Channel 2
Channel 1
Channel 0
Channel 3
Channel 2
Channel 1
Channel 0
Channel 3
Channel 2
Channel 1
Channel 0
Channel 3
Channel 2
Channel 1
Channel 0
Stratix IV Device Handbook Volume 2: Transceivers
(Note 1)
2–57

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