EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 813

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EP4SE530H40I3

Manufacturer Part Number
EP4SE530H40I3
Description
IC STRATIX IV FPGA 530K 1517HBGA
Manufacturer
Altera
Series
STRATIX® IV Er

Specifications of EP4SE530H40I3

Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
976
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1517-HBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-

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Chapter 4: Reset Control and Power Down in Stratix IV Devices
Transceiver Reset Sequences
Figure 4–3. Sample Reset Sequence for Four Transmitter Only Channels
Note to
(1) For t
February 2011 Altera Corporation
Reset and Power-Down Signals
Figure
pll_powerdown
4–3:
Output Status Signals
duration, refer to the
pll_powerdown
Transmitter Only Channel
This configuration contains only a transmitter channel. If you create a Transmitter
Only instance in the ALTGX MegaWizard Plug-In Manager in Basic ×4 functional
mode, use the reset sequence shown in
tx_digitalreset
As shown in
reset steps:
1. After power up, assert pll_powerdown for a minimum period of t
2. Keep the tx_digitalreset signal asserted during this time period. After you
3. When the transmitter PLL locks, as indicated by the pll_locked signal going high
pll_locked
time between markers 1 and 2).
de-assert the pll_powerdown signal, the transmitter PLL starts locking to the
transmitter input reference clock.
(marker 3), de-assert the tx_digitalreset signal (marker 4). At this point, the
transmitter is ready for transmitting data.
DC and Switching Characteristics for Stratix IV Devices
1
t
pll_powerdown (1)
Figure
4–3, for the Transmitter Only channel configuration, follow these
2
3
4
Figure
4–3.
Stratix IV Device Handbook Volume 2: Transceivers
chapter.
pll_powerdown
(the
4–7

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