EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 247

• Manufacturer Part Number: EP4SE530H40I3
• Description: IC STRATIX IV FPGA 530K 1517HBGA
• Manufacturer: Altera
• Series: STRATIX® IV Er

Specifications of EP4SE530H40I3

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 976
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1517-HBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

Chapter 7: External Memory Interfaces in Stratix IV Devices
Memory Interfaces Pin Support
February 2011 Altera Corporation
Rules to Combine Groups
In 780-, 1152-, and some 1517-pin package devices, there is at most one ×16/×18 group
per I/O sub-bank. You can combine two ×16/×18 groups from a single side of the
device for a ×36 interface.
For devices that do not have four ×16/×18 groups in a single side of the device to
form two ×36 groups for read and write data, you can form one ×36 group on one side
of the device and another ×36 group on the other side of the device.
For vertical migration with the ×36 emulation implementation, check if migration is
possible by enabling device migration in the Quartus II project. The Quartus II
software supports the use of four ×8/×9 DQ groups for write data pins and migration
of these groups across device density.
two ×16/×18 DQS/DQ groups to form a ×32/×36 group on Stratix IV devices lacking
a native ×32/×36 DQS/DQ group.
Table 7–3. Possible Group Combinations in Stratix IV Devices (Part 1 of 2)
780-Pin
FineLine BGA
1152-Pin
FineLine BGA
Package
■
■
■
■
■
■
■
■
■
■
■
■
■
■
■
■
■
■
EP4SGX70
EP4SGX110
EP4SGX180
EP4SGX230
EP4SGX290
EP4SGX360
EP4SE230
EP4SE360
EP4SGX70
EP4SGX110
EP4SGX180
EP4SGX230
EP4SGX290
EP4SGX360
EP4SGX530
EP4SE360
EP4SE530
EP4SE820
Device Density
(2)
(2)
(2)
3A and 4A, 7A and 8A (bottom and top I/O banks)
1A and 2A, 5A and 6A (left and right I/O banks)
3A and 4A, 7A and 8A (bottom and top I/O banks)
3A and 4A, 7A and 8A (bottom and top I/O banks)
1A and 1C, 6A and 6C (left and right I/O banks)
3A and 3B, 4A and 4B (bottom I/O banks)
7A and 7B, 8A and 8B (top I/O banks)
1A and 1C, 2A and 2C (left I/O banks)
3A and 3B, 4A and 4B (bottom I/O banks)
5A and 5C, 6A and 6C (right I/O banks)
7A and 7B, 8A and 8B (top I/O banks)
Table 7–3
lists the possible combinations to use
I/O Sub-Bank Combinations
Stratix IV Device Handbook Volume 1
(1)
(1)
(1)
7–27