DS3105 Maxim Integrated Products, DS3105 Datasheet - Page 101

• Manufacturer Part Number: DS3105
• Description: Line Card Timing IC
• Manufacturer: Maxim Integrated Products

10.4 SPI Interface Timing
Table 10-10. SPI Interface Timing
(VDD = 1.8V ± 10%; VDDIO = 3.3V ± 5%, T
Note 1:
Figure 10-4. SPI Interface Timing Diagram
SCLK Frequency
SCLK Cycle Time
CS Setup to First SCLK Edge
CS Hold time After Last SCLK Edge
SCLK High Time
SCLK Low Time
SDI Data Setup Time
SDI Data Hold Time
SDO Enable Time (High-Impedance to Output Active)
SDO Disable Time (Output Active to High-Impedance)
SDO Data Valid Time
SDO Data Hold Time After Update SCLK Edge
Confidential. Document Issued Under Non-Disclosure Agreement. Confidential. Document Issued Under Non-Disclosure Agreement.
All timing is specified with 100 pF load on all SPI pins.
CPHA = 0
CPHA = 1
SCLK
SCLK
SDO
SDO
SDI
SDI
CS
CS
t
t
PARAMETER (Note 1)
SUC
SUC
t
SUI
t
HDI
t
t
CLKH
CLKH
t
SUI
t
t
CYC
CYC
t
HDI
t
t
CLKL
CLKL
Preliminary. Subject to Change Without Notice.
A
= -40°C to +85°C)
t
EN
101 of 110
t
EN
t
HDO
(Figure
SYMBOL
t
t
t
t
HDO
f
t
t
t
t
CLKH
t
t
t
10-4)
CLKL
HDC
t
t
HDO
DV
BUS
CYC
SUC
SUI
HDI
DIS
EN
DV
t
DV
MIN
100
15
15
50
50
15
5
0
5
t
TYP
DIS
t
t
t
HDC
DIS
HDC
MAX
25
50
6
UNITS
DS3105
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns