DS3105 Maxim Integrated Products, DS3105 Datasheet - Page 90

• Manufacturer Part Number: DS3105
• Description: Line Card Timing IC
• Manufacturer: Maxim Integrated Products

Register Name:
Register Description:
Register Address:
Name
Default
Bit 7: Independent Frame Sync and Multi-frame Sync (INDEP). When this bit is set to 0, the 8 kHz frame sync
on FSYNC and the 2 kHz multi-frame sync on MFSYNC are aligned with the other output clocks when
synchronized with the SYNCn input. When this bit is 1, the frame sync and multi-frame sync are independent of the
other output clocks, and their edge position may change without disturbing the other output clocks. See section
7.9.5.
Bit 6: Sync OC-N Rates (OCN). See section 7.9.2.
Bits 5 to 4: External Sync Sampling Phase 3. (PHASE3[1:0]). This field adjusts the sampling of the SYNC3 input
pin. Normally the falling edge of SYNC3 is aligned with the falling edge of the selected reference. All UI numbers
listed below are UI of the sampling clock. See section 7.9.1.
Bits 3 to 2: External Sync Sampling Phase 2. (PHASE2[1:0]). This field adjusts the sampling of the SYNC2 input
pin. Normally the falling edge of SYNC2 is aligned with the falling edge of the selected reference. All UI numbers
listed below are UI of the sampling clock. See section 7.9.1.
Bits 1 to 0: External Sync Sampling Phase 1. (PHASE1[1:0]). This field adjusts the sampling of the SYNC1 input
pin. Normally the falling edge of SYNC1 is aligned with the falling edge of the selected reference. All UI numbers
listed below are UI of the sampling clock. See section 7.9.1.
Confidential. Document Issued Under Non-Disclosure Agreement. Confidential. Document Issued Under Non-Disclosure Agreement.
0 = FSYNC and MFSYNC are aligned with other output clocks; all are synchronized by the SYNCn input
1 = FSYNC and MFSYNC are independent of the other clock outputs; only FSYNC and MFSYNC are
0 = SYNCn is sampled with a 6.48 MHz resolution; the selected reference must be 6.48 MHz
1 = If the selected reference is 19.44 MHz, SYNCn is sampled at 19.44 MHz and output alignment is to
00 = Coincident
01 = 0.5 UI early
10 = 1 UI late
11 = 0.5 UI late
00 = Coincident
01 = 0.5 UI early
10 = 1 UI late
11 = 0.5 UI late
00 = Coincident
01 = 0.5 UI early
10 = 1 UI late
11 = 0.5 UI late
synchronized by the SYNCn input
19.44 MHz. If the selected reference is 38.88 MHz, SYNCn is sampled at 38.88 MHz. The selected
reference must be either 19.44 MHz or 38.88 MHz
INDEP
Bit 7
0
Bit 6
OCN
0
FSCR2
Frame Sync Configuration Register 2
7Bh
Preliminary. Subject to Change Without Notice.
Bit 5
0
PHASE3[1:0]
90 of 110
Bit 4
0
Bit 3
0
PHASE2[1:0]
Bit 2
0
Bit 1
0
PHASE1[1:0]
Bit 0
DS3105
0