DS3105 Maxim Integrated Products, DS3105 Datasheet - Page 7

• Manufacturer Part Number: DS3105
• Description: Line Card Timing IC
• Manufacturer: Maxim Integrated Products

2 APPLICATION EXAMPLE
Figure 2-1. Typical Application Example
3 BLOCK DIAGRAM
Figure 3-1. Functional Block Diagram
See
Selector block.
Confidential. Document Issued Under Non-Disclosure Agreement. Confidential. Document Issued Under Non-Disclosure Agreement.
From Master Timing Card
Figure 7-1
From Slave Timing Card
IC5 POS/NEG
IC6 POS/NEG
SYNC3/ O3F0
SYNC1
SYNC2
JTRST*
JTCLK
JTMS
JTDO
on page 22 for a detailed view of the T0 and T4 DPLLs and the Output Clock Synthesizer and
JTDI
IC3
IC4
IC9
19.44 MHz
19.44 MHz
JTAG
IC3
IC4
DS3105
Input Clock
Selector,
Preliminary. Subject to Change Without Notice.
Divider,
Monitor
Selector,
Monitor
Divider
Clock
Input
and
and HW Control and Status Pins
Microprocessor Port
T0 DPLL
prog. bandwidth,
phase build-out,
(SPI Serial)
holdover, etc.
measurement)
T4 DPLL
(phase/freq.
Frequency Conversion)
7 of 110
(Filtering, Holdover,
PLL Bypass
Hitless Switching,
T0 DPLL
and Selector
Synthesizer
Output
Clock
TCXO
XO or
OC3
OC6
155.52MHz differential
Master Clock
Output Dividers)
Synthesizer
7 DFS Blocks,
Generator
Selector
Output
3 APLLs,
(Muxes,
Clock
19.44 MHz
and
REFCLK
Oscillator
Local
To SONET/SDH framers,
Clock Multiplying APLLs, etc.
on the Line Card
OC3
OC6 POS/NEG
FSYNC
MFSYNC
DS3105