DS3105 Maxim Integrated Products, DS3105 Datasheet - Page 95

• Manufacturer Part Number: DS3105
• Description: Line Card Timing IC
• Manufacturer: Maxim Integrated Products

Figure 9-2. JTAG TAP Controller State Machine
9.3 JTAG Instruction Register and Instructions
The instruction register contains a shift register as well as a latched parallel output and is 3 bits in length. When the
TAP controller enters the Shift-IR state, the instruction shift register is connected between JTDI and JTDO. While in
the Shift-IR state, a rising edge on JTCLK with JTMS low shifts data one stage toward the serial output at JTDO. A
rising edge on JTCLK in the Exit1-IR state or the Exit2-IR state with JTMS high moves the controller to the Update-
IR state. The falling edge of that same JTCLK latches the data in the instruction shift register to the instruction
parallel output.
codes.
Table 9-1. JTAG Instruction Codes
SAMPLE/PRELOAD. SAMPLE/RELOAD is a mandatory instruction for the IEEE 1149.1 specification. This
instruction supports two functions. First, the digital I/Os of the device can be sampled at the boundary scan
register, using the Capture-DR state, without interfering with the device’s normal operation. Second, data can be
shifted into the boundary scan register through JTDI using the Shift-DR state.
SAMPLE/PRELOAD
Confidential. Document Issued Under Non-Disclosure Agreement. Confidential. Document Issued Under Non-Disclosure Agreement.
INSTRUCTIONS
BYPASS
EXTEST
IDCODE
CLAMP
HIGHZ
1
0
Table 9-1
Test-Logic-Reset
Run-Test/Idle
0
shows the instructions supported by the DS3105 and their respective operational binary
SELECTED REGISTER
Device Identification
Boundary Scan
Boundary Scan
1
Bypass
Bypass
Bypass
Preliminary. Subject to Change Without Notice.
1
0
Capture-DR
1
Select
DR-Scan
Shift-DR
Pause-DR
Update-DR
Exit1- DR
Exit2-DR
95 of 110
0
0
1
0
1
1
INSTRUCTION CODES
0
1
0
1
0
010
111
000
011
100
001
1
0
Capture-IR
1
Select
IR-Scan
Shift-IR
Exit1-IR
Pause-IR
Exit2-IR
Update-IR
0
0
1
0
1
1
0
1
0
1
0
DS3105