DS3105 Maxim Integrated Products, DS3105 Datasheet - Page 4

• Manufacturer Part Number: DS3105
• Description: Line Card Timing IC
• Manufacturer: Maxim Integrated Products

Preliminary. Subject to Change Without Notice.
DS3105
LIST OF FIGURES
Figure 2-1. Typical Application Example ..................................................................................................................... 7
Figure 3-1. Functional Block Diagram ......................................................................................................................... 7
Figure 7-1. DPLL Block Diagram ............................................................................................................................... 22
Figure 7-2. T0 DPLL State Transition Diagram ......................................................................................................... 24
Figure 7-3. FSYNC 8 kHz Options............................................................................................................................. 38
Figure 7-4. SPI Clock Phase Options ........................................................................................................................ 42
Figure 7-5. SPI Bus Transactions.............................................................................................................................. 42
Figure 9-1. JTAG Block Diagram............................................................................................................................... 93
Figure 9-2. JTAG TAP Controller State Machine ...................................................................................................... 95
Figure 10-1. Recommended Termination for LVDS Pins .......................................................................................... 99
Figure 10-2. Recommended Termination for LVPECL Signals on Differential Input Pins ........................................ 99
Figure 10-3 Recommended Termination for LVPECL Level-Compatible Output Pins.............................................. 99
Figure 10-4. SPI Interface Timing Diagram ............................................................................................................. 101
Figure 10-5. JTAG Timing Diagram......................................................................................................................... 102
Figure 10-6. Reset Pin Timing Diagram .................................................................................................................. 103
Figure 11-1. Pin Assignment Diagram..................................................................................................................... 105
Figure 12-1. LQFP Mechanical Dimensions............................................................................................................ 106
Confidential. Document Issued Under Non-Disclosure Agreement. Confidential. Document Issued Under Non-Disclosure Agreement.
4 of 110