DS3105 Maxim Integrated Products, DS3105 Datasheet - Page 82

• Manufacturer Part Number: DS3105
• Description: Line Card Timing IC
• Manufacturer: Maxim Integrated Products

Register Name:
Register Description:
Register Address:
Name
Default
Bits 6 to 4: Phase Detector 2 Gain, 8 kHz (PD2G8K[2:0]). This field specifies the gain of the T0 phase detector 2
with an input clock of 8 kHz or less. This value is only used if automatic gain selection is enabled by setting
PD2EN=1 in the
Bits 2 to 0: Damping Factor (DAMP[2:0]). This field configures the damping factor of the T0 DPLL. Damping
factor is a function of both DAMP[2:0] and the T0 DPLL bandwidth
corresponds to a damping factor of 5. See section 7.7.4.
The gain peak for each damping factor is shown below:
Confidential. Document Issued Under Non-Disclosure Agreement. Confidential. Document Issued Under Non-Disclosure Agreement.
001 =
010 =
011 =
100 =
101 =
000, 110 and 111 = {unused values}
Damping Factor
1.2
2.5
10
20
Bit 7
5
T0CR3
--
0
≤ 4 Hz
5
5
5
5
5
register. See section 7.7.5.
Bit 6
Gain Peak
0
0.06 dB
0.03 dB
0.4 dB
0.2 dB
0.1 dB
T0CR2
T0 Configuration Register 2
6Bh
8 Hz
2.5
5
5
5
5
PD2G8K[2:0]
Preliminary. Subject to Change Without Notice.
Bit 5
0
18 Hz
1.2
2.5
5
5
5
82 of 110
Bit 4
1
35 Hz
1.2
2.5
10
10
5
Bit 3
--
0
(T0ABW
70 Hz
1.2
2.5
10
20
5
Bit 2
and T0LBW). The default value
0
DAMP[2:0]
Bit 1
1
Bit 0
DS3105
1