pic32mx320f064h Microchip Technology Inc., pic32mx320f064h Datasheet - Page 105

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pic32mx320f064h

Manufacturer Part Number
pic32mx320f064h
Description
64/100-pin General Purpose, 32-bit Flash Microcontrollers
Manufacturer
Microchip Technology Inc.
Datasheet

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EXAMPLE 5-7:
EXAMPLE 5-8:
© 2007 Microchip Technology Inc.
/*
The following code example demonstrates a simple Interrupt Service Routine for DMA channel 0
interrupts. The user’s code at this vector should perform any application specific operations
and must clear the DMA0 interrupt flags before exiting.
*/
void __ISR(_DMA0_VECTOR, IPL5) __DMA0Interrupt(void)
{
}
/*
The following code example illustrates a DMA channel 0 interrupt configuration.
When the DMA channel 0 interrupt is generated, the CPU will jump to the vector assigned to DMA0
interrupt.
*/
Note:
int dmaFlags=DCH0INT&0xff;
// perform application specific operations in response to any interrupt flag set
DCH0INTCLR=0x000000ff;
IFS1CLR = 0x00010000;
IEC1CLR=0x00010000;
IFS1CLR=0x00010000;
DMACONSET=0x00008000;
DCH0CON=0x03;
DCH0ECON=0;
DCH0SSA=0x1d010000;
DCH0DSA=0x1d020000;
DCH0SSIZ=0;
DCH0DSIZ=0;
DCH0CSIZ=0;
DCH0INTCLR=0x00ff00ff;
DCH0INTSET=0x00090000;
IPC9CLR=0x0000001f;
IPC9SET=0x00000016;
IEC1SET=0x00010000;
DCH0CONSET=0x80;
DCH0ECONSET=0x00000080;
// do something else
// will get an interrupt when the block transfer is done
// or when error occurred
The DMA ISR code example shows MPLAB
compiler specific syntax. Refer to your compiler
manual regarding support for ISRs.
DMA INITIALIZATION WITH INTERRUPTS
DMA CHANNEL 0 ISR
// disable DMA channel 0 interrupts
// clear any existing DMA channel 0 interrupt flag
// enable the DMA controller
// channel off, priority 3, normal mode, no chaining
// no start or stop irq’s, no pattern match
// program the transfer
// transfer source physical address
// transfer destination physical address
// source size 256 bytes
// destination size 256 bytes
// 256 bytes transferred pe event
// clear existing events, disable all interrupts
// enable Block Complete and error interrupts
// clear the DMA channel 0 priority and subpriority
// set IPL 5, subpriority 2
// enable DMA channel 0 interrupt
// turn channel on
// initiate a transfer
// set CFORCE to 1
Advance Information
// read the interrupt flags
// clear the DMA channel interrupt flags
// Be sure to clear the DMA0 interrupt flags
// before exiting the service routine.
®
C32 C
PIC32MX FAMILY
DS61143A-page 103

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