pic32mx320f064h Microchip Technology Inc., pic32mx320f064h Datasheet - Page 66
pic32mx320f064h
Manufacturer Part Number
pic32mx320f064h
Description
64/100-pin General Purpose, 32-bit Flash Microcontrollers
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC32MX320F064H.pdf
(544 pages)
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PIC32MX FAMILY
TABLE 5-6:
TABLE 5-7:
DS61143A-page 64
Note
Note
BF88_31DC
BF88_318C
BF88_31BC DCH1CSIZINV
BF88_31C0
BF88_31D0
BF88_31D4
BF88_31D8
BF88_3180
BF88_3184 DCH1DSIZCLR
BF88_3188 DCH1DSIZSET
BF88_3190
BF88_31A0
BF88_31B0
BF88_31B4 DCH1CSIZCLR
BF88_31B8 DCH1CSIZSET
BF88_1070
BF88_1040
BF88_1120
Address
Address
Virtual
Virtual
1:
2:
1:
The starting address of the registers for DMA channel n is 0xbf883060 + 0xc0*n.
These bits are relevant in Extended Addressing mode only.
This summary table contains partial register definitions that only pertain to the DMA peripheral. Refer to the “PIC32MX Family
Reference Manual” (DS61132) for a detailed description of these registers.
DCH1DSIZINV
DCH1DATCLR
DCH1DATSET
DCH1DATINV
DCH1DPTR
DCH1CPTR
DCH1SPTR
DCH1DSIZ
DCH1CSIZ
DCH1DAT
IEC1
IFS1
IPC9
Name
DMA CHANNEL 1 SFR SUMMARY (CONTINUED)
DMA CHANNEL 1 INTERRUPT REGISTER SUMMARY
Name
23:16
23:16
15:8
31:24
23:16
31:24
23:16
31:24
23:16
31:24
23:16
31:24
23:16
31:24
23:16
31:0
31:0
31:0
31:0
31:0
31:0
31:0
31:0
15:8
15:8
15:8
15:8
15:8
15:8
31:0
7:0
7:0
7:0
7:0
7:0
7:0
31/23/15/7
31/23/15/7
Bit
—
—
—
Bit
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
30/22/14/6
30/22/14/6
Advance Information
Bit
—
—
—
Bit
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Write inverts selected bits in DCH1DSIZ, read yields undefined value
Write inverts selected bits in DCH1CSIZ, read yields undefined value
Write clears selected bits in DCH1DSIZ, read yields undefined value
Write clears selected bits in DCH1CSIZ, read yields undefined value
Write inverts selected bits in DCH1DAT, read yields undefined value
Write clears selected bits in DCH1DAT, read yields undefined value
Write sets selected bits in DCH1DSIZ, read yields undefined value
Write sets selected bits in DCH1CSIZ, read yields undefined value
Write sets selected bits in DCH1DAT, read yields undefined value
29/21/13/5
29/21/13/5
Bit
—
—
—
Bit
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
28/20/12/4
28/20/12/4
Bit
—
—
CHDPTR<15:8>
CHDSIZ<15:8>
Bit
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
CHDPTR<7:0>
CHCPTR<7:0>
CHSPTR<7:0>
CHPDAT<7:0>
CHDSIZ<7:0>
CHCSIZ<7:0>
DMA1IP<2:0>
27/19/11/3
DMA3IE
DMA3IF
27/19/11/3
Bit
Bit
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
(2)
(2)
(1)
26/18/10/2
DMA2IE
DMA2IF
26/18/10/2
© 2007 Microchip Technology Inc.
Bit
Bit
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
25/17/9/1
DMA1IE
DMA1IF
25/17/9/1
Bit
DMA1IS<1:0>
Bit
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
24/16/8/0
DMA0IE
DMA0IF
24/16/8/0
Bit
Bit
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
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