pic32mx320f064h Microchip Technology Inc., pic32mx320f064h Datasheet - Page 242

• Manufacturer Part Number: pic32mx320f064h
• Description: 64/100-pin General Purpose, 32-bit Flash Microcontrollers
• Manufacturer: Microchip Technology Inc.

PIC32MX FAMILY
TABLE 11-3:
11.8
There are two sources of interrupts that will wake the
device from a Power-Saving mode: peripheral inter-
rupts, and a Non-Maskable Interrupt (NMI) generated
by the WDT in Power-Saving mode.
11.9
Any source of interrupt that is individually enabled
using the corresponding IE control bit in the IECx reg-
ister and is operational in the current Power-Saving
mode will be able to wake-up the processor from
SLEEP or IDLE mode. When the device wakes, one of
two events will occur, based on the interrupt priority:
• If the assigned priority for the interrupt is less
• If the assigned priority level for the interrupt
The IDLE Status bit (RCON<2>) is set upon wake-up
from IDLE mode. The SLEEP Status bit (RCON<3>) is
set upon wake-up from SLEEP mode.
DS61143A-page 240
than, or equal to, the current CPU priority, the
CPU will remain halted and the device enters, or
remains in, IDLE mode.
source is greater than the current CPU priority,
the device will wake-up and the CPU will jump to
the corresponding interrupt vector. Upon
completion of the ISR, the CPU will start
executing the next instruction after WAIT.
// Code example to put the Device in Idle and then Wake the device
// when the ADC completes a conversion
OSCCONCLR = 0x10;
asm ( “wait” );
// code execution will resume here after wake and the ISR is complete
// interrupt handler
__ADC1Interrupt:
... ISR code ...
asm ( “eret” );
... user code ...
Interrupts
Wake-Up from SLEEP or IDLE on
Peripheral Interrupt
PLACING DEVICE IN IDLE AND WAKING BY ADC EVENT
Advance Information
// set Power-Saving mode to Idle
// put device in selected Power-Saving mode
// return from interrupt
Notes: A peripheral with an interrupt priority set-
ting of zero cannot wake the device.
Any applicable oscillator start-up delays
are applied before the CPU resumes
code execution.
© 2007 Microchip Technology Inc.