pic32mx320f064h Microchip Technology Inc., pic32mx320f064h Datasheet - Page 365

• Manufacturer Part Number: pic32mx320f064h
• Description: 64/100-pin General Purpose, 32-bit Flash Microcontrollers
• Manufacturer: Microchip Technology Inc.

REGISTER 19-2:
© 2007 Microchip Technology Inc.
bit 10
bit 9
bit 8
bit 7-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
TXEN: Transmit Enable bit
1 = UARTx transmitter enabled, UxTX pin controlled by UARTx (if ON = 1)
0 = UARTx transmitter disabled, any pending transmission is aborted and buffer is reset. UxTX pin
UTXBF: Transmit Buffer Full Status bit (read-only)
1 = Transmit buffer is full
0 = Transmit buffer is not full, at least one more character can be written
TRMT: Transmit Shift Register is Empty bit (read-only)
1 = Transmit shift register is empty and transmit buffer is empty (the last transmission has completed)
0 = Transmit shift register is not empty, a transmission is in progress or queued in the transmit buffer
URXISEL<1:0>: Receive Interrupt Mode Selection bit
11 = Interrupt flag bit is set when Receive Buffer is full (i.e., has 4 data characters)
10 = Interrupt flag bit is set when Receive Buffer is 3/4 full (i.e., has 3 data characters)
0x = Interrupt flag bit is set when a character is received
ADDEN: Address Character Detect (bit 8 of received data = 1)
1 = Address Detect mode enabled. If 9-bit mode is not selected, this control bit has no effect.
0 = Address Detect mode disabled
RIDLE: Receiver Idle bit (read-only)
1 = Receiver is Idle
0 = Data is being received
PERR: Parity Error Status bit (read-only)
1 = Parity error has been detected for the current character
0 = Parity error has not been detected
FERR: Framing Error Status bit (read-only)
1 = Framing Error has been detected for the current character
0 = Framing Error has not been detected
OERR: Receive Buffer Overrun Error Status bit (clear/read-only)
1 = Receive buffer has overflowed
0 = Receive buffer has not overflowed (clearing a previously set OERR bit will reset the receiver buffer
RXDA: Receive Buffer Data Available bit (read-only)
1 = Receive buffer has data, at least one more character can be read
0 = Receive buffer is empty
controlled by PORT.
and Receive Shift Register (RSR) to an empty state)
UxSTA: UARTx STATUS REGISTER (CONTINUED)
Advance Information
PIC32MX
DS61143-page 363