pic32mx320f064h Microchip Technology Inc., pic32mx320f064h Datasheet - Page 397

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pic32mx320f064h

Manufacturer Part Number
pic32mx320f064h
Description
64/100-pin General Purpose, 32-bit Flash Microcontrollers
Manufacturer
Microchip Technology Inc.
Datasheet

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1.
2.
3.
4.
EXAMPLE 20-6:
20.4
The PMP module has the ability to generate the follow-
ing types of interrupts reflecting the events that occur
during data transfers.
Master mode:
• Interrupt on every read and write operation.
Legacy Slave mode:
• Interrupt on every read and write byte
Buffered Slave mode:
• Interrupt on every read and write byte
• Interrupt on read or write byte of Buffer 3
• Interrupt on every read and write byte
• Interrupt on read or write byte of Buffer 3
The PMP module is enabled as a source of interrupt
using the PMP interrupt enable bit:
• PMPIE (IEC1<2>).
The interrupt priority level and subpriority level bits
must also be configured:
• The PMP interrupt status flag, PMPIF (IFS1<2>)
© 2007 Microchip Technology Inc.
Addressable Slave mode:
IEC1CLR = 0x0004
PMCON = 0x0000
PMMODE = 0x0100
IPC7SET = 0x001C;
IPC7SET = 0x0003;
IFS1CLR
IEC1SET
PMCONSET = 0x8000;
(PMDOUT<31:24>)
(PMDOUT<31:24>), PMA<1:0> = 11
- PMPIP<2:0> (IPC7<4:2>)
- PMPIS<1:0> (IPC7<1:0>)
If interrupts are used, disable the PMP interrupt
by clearing the interrupt enable bit PMPIE
(IEC1<2>) = 0.
Stop and reset the PMP module by clearing the
control bit ON (PMCON<15>) = 0.
Configure the desired settings in the PMCON
and PMMODE control registers.
If interrupts are used:
PMP Interrupts
= 0x0004;
= 0x0004;
ADDRESSABLE PARALLEL SLAVE PORT INITIALIZATION
//Disable PMP int
//Stop and Configure
//Config PMMODE
//Priority level=7
//subpriority=3
//Same as...
//IPC7SET=0x001F
//Enable PMP module
//Clear PMP int flag
//Enable PMP int
Advance Information
5.
Below is a partial code example of an ISR.
is typically cleared by the user’s software in the
ISR.
Note:
a)
b)
c)
Enable the PMP slave port by setting control bit
ON = 1.
PIC32MX FAMILY
Clear interrupt flag bit PMPIF
(IFS1<2>) = 0.
Configure the PMP interrupt priority bits
PMPIP<2:0> (IPC7<4:2>) and interrupt sub
priority bits PMPIS (IPC7<1:0>.
Enable PSP interrupt by setting interrupt
enable bit PMPIE = 1.
It is the user’s responsibility to clear the
corresponding interrupt flag bit before
returning from an ISR.
DS61143A-page 395

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