pic32mx320f064h Microchip Technology Inc., pic32mx320f064h Datasheet - Page 371

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pic32mx320f064h

Manufacturer Part Number
pic32mx320f064h
Description
64/100-pin General Purpose, 32-bit Flash Microcontrollers
Manufacturer
Microchip Technology Inc.
Datasheet

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19.12 UART Interrupts
The UART device has the ability to generate interrupts,
reflecting the events that occur during data communi-
cation. The following types of interrupts can be
generated:
• Receiver-data-available interrupts, signalled by
• Transmitter-buffer-empty interrupts, signalled by
• Receiver-buffer-overflow interrupt, signalled by
EXAMPLE 19-4:
EXAMPLE 19-5:
© 2007 Microchip Technology Inc.
/*
*/
U1RXIF (IFS0<27>), U2RXIF (IFS1<9>). This
event occurs when there is new data assembled
in the UxRXBUF receive buffer.
U1TXIF (IFS0<28>), U2TXIF (IFS1<10>). This
event occurs when there is space available in the
UxTXBUF transmit buffer and new data can be
written.
U1EIF (IFS0<26>), U2EIF (IFS1<8>). This event
occurs when there is an overflow condition for the
UxRXBUF receive buffer, i.e., new receive data
assembled but the previous one not read.
/*
*/
#pragma interupt Uart1IntHandler ipl4 vector 25
void Uart1IntHandler(void)
{
IFS0CLR = 0x1c000000;
}
The following code example illustrates a UART1 interrupt configuration.
When the UART1 interrupt is generated, the cpu will jump to the vector assigned to UART1
interrupt.
IEC0CLR=0x1c000000;
IFS0CLR=0x1c000000;
IPC6CLR=0x0000001f;
IPC6SET=0x000d;
IEC0SET=0x1c000000;
U1BRG
U1MODESET= 0x8000;
U1STASET= 0x1400;
The following code example demonstrates a simple interrupt service routine for UART1
interrupts. The user’s code at this vector should perform any application specific operations
and must clear the UART1 interrupt flags before exiting.
... perform application specific operations in response to the interrupt
= #BaudRate;
UART INITIALIZATION WITH INTERRUPTS ENABLE
UART1 ISR
Advance Information
// disable all UART1 interrupts
// clear any existing event
// clear the priority
// Set IPL=3, subpriority 1
// Enable Rx, Tx and Error interrupts
// Set Uart baud rate.
// Enable Uart for 8-bit Data, no Parity, and 1 Stop bit
// Enable Transmitter and Receiver
// Be sure to clear the UART1 interrupt flags
// before exiting the service routine.
A UART device is enabled as a source of interrupts via
the respective UART interrupt enable bits:
• U1RXIE (IEC0<27>) and U2RXIE (IEC1<9>)
• U1TXIE (IEC0<28>) and U2TXIE (IEC1<10>)
• U1EIE (IEC0<26>) and U2EIE (IEC1<8>)
The interrupt priority level bits and interrupt subpriority
level bits must be also be configured:
• U1IP (IPC6<4:2>), U1IS (IPC6<1:0>)
• U2IP (IPC8<4:2>), U2IS (IPC8<1:0>).
In addition to enabling the UART interrupts, an Interrupt
Service Routine (ISR) is required. Below is a partial
code example of an ISR.
Note:
It is the user’s responsibility to clear the
corresponding interrupt flag bit before
returning from an ISR.
PIC32MX
DS61143-page 369

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