pic32mx320f064h Microchip Technology Inc., pic32mx320f064h Datasheet - Page 274

• Manufacturer Part Number: pic32mx320f064h
• Description: 64/100-pin General Purpose, 32-bit Flash Microcontrollers
• Manufacturer: Microchip Technology Inc.

PIC32MX FAMILY
13.4
Due to the asynchronous nature of Timer1 operating in
Asynchronous Clock mode, reading and writing to the
TMR1
between the asynchronous clock source and the inter-
nal PBCLK (Peripheral Bus Clock). Timer1 features a
Timer
(T1CON<12>) and a TMWIP (TImer Write in Progress)
Status bit (T1CON<11>). These bits provide the user
with 2 options for safely writing to the TMR1 Count
register while Timer1 is enabled. These bits have no
affect in Synchronous Clock modes.
• Option 1 – Legacy Timer1 Write mode, TMWDIS
• Option 2 – New synchronized Timer1 Write mode,
Writing to the TMR1 Count register requires 2 to 3
asynchronous external clock cycles for the value to be
synchronized into the TMR1 Count register.
Reading from the TMR1 Count register requires 2
PBCLK cycle delays between the current unsynchro-
nized value in the TMR1 Count register and the
synchronized value returned by the read operation. In
other words, the value read is always 2 PBCLK cycles
behind the actual value in the TMR1 Count register.
The following steps should be performed to properly
configure the Timer1 peripheral for Asynchronous
Counter mode operation.
1.
2.
3.
4.
5.
6.
7.
8.
DS61143A-page 272
bit = 0. To determine when it is safe to write to the
TMR1 Count register, it is recommended to poll
the TMWIP bit. When TMWIP = 0, it is safe to per-
form the next write operation to the TMR1 Count
register. When TMWIP = 1, the previous write
operation to the TMR1 Count register is still being
synchronized and any additional write operations
should wait until TMWIP = 0.
TMWDIS bit = 1. A write to the TMR1 Count regis-
ter can be performed at any time. However, if the
previous write operation to the TMR1 Count regis-
ter is still being synchronized, any additional write
operations are ignored.
Clear control bit, ON (T1CON<15>) = 0, to
disable Timer1.
Select the desired timer prescaler using bits,
TCKPS<1:0> (T1CON<5:4).
Set control bit, TCS (T1CON<1>) = 1, to select
an external clock source.
Set control bit, TSYNC (T1CON<2>) = 0, to
disable synchronization.
Clear Timer Register, TMR1.
Load Period Register, PR1, with desired 16-bit
match value.
If timer interrupts are used, refer to 13.5 “Timer
Interrupts” for interrupt configuration steps.
Set control bit, ON (T1CON<15>) = 1, to enable
Timer1.
Count
Write
Reading and Writing TMR1
Register
Disable
register
requires
(TMWDIS)
synchronization
control
Advance Information
bit
EXAMPLE 13-3:
T1CON = 0x0;
T1CON = 0x0012;
TMR1 = 0x0;
PR1 = 0x7FFF;
T1CONSET = 0x8000; // Start Timer
ASYNCHRONOUS
EXTERNAL TIMER
INITIALIZATION
© 2007 Microchip Technology Inc.
// Set prescaler at 1:8,
// external clock source,
// asynchronous mode
// Clear timer register
// Load period register
// Stop Time and reset