pic32mx320f064h Microchip Technology Inc., pic32mx320f064h Datasheet - Page 227

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pic32mx320f064h

Manufacturer Part Number
pic32mx320f064h
Description
64/100-pin General Purpose, 32-bit Flash Microcontrollers
Manufacturer
Microchip Technology Inc.
Datasheet

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EXAMPLE 10-2:
10.2.5.4
If the device enters Sleep mode during a clock switch
operation, the clock switch operation is aborted. The
processor keeps the old clock selection and the
OSWEN bit (OSCCON<0>) is cleared. The WAIT
instruction is then executed normally.
10.2.5.5
The SOSC can be used by modules as well as the
CPU, therefore, the SOSC is controlled by a combina-
tion of software and hardware. Setting the SOSCEN bit
(OSCCON<1>) to a ‘1’ enables the SOSC. The SOSC
is disabled when it is not being used by the CPU mod-
ule and the SOSCEN bit is ‘0’. If the SOSC is being
TABLE 10-5:
© 2007 Microchip Technology Inc.
Note 1:
Pin Name
SOSCO
SYSKEY = 0x12345678;
SYSKEY = 0xAA996655;
SYSKEY = 0x556699AA;
OSCCONCLR = 111 << 16;
OSCCONSET = 101 << 16;
OSCCONSET = 1;
SYSKEY = 0x12345678;
SOSCI
OSCO
OSCO
OSCO
OSCO
OSCI
OSCI
N/A
N/A
N/A
N/A
During device start-up, the device oscillator configuration data is copied from device configuration to
COSC.
Entering Sleep Mode During a Clock
Switch
SOSC Control
FRC, FRCPLL, FRCDIV16, FRCDIV, LPRC
FRC, FRCPLL, FRCDIV16, FRCDIV, LPRC
FRC, FRCPLL, FRCDIV16, FRCDIV, LPRC
FRC, FRCPLL, FRCDIV16, FRCDIV, LPRC
CONFIGURATION OF PINS ASSOCIATED WITH THE OSCILLATOR MODULE
PERFORMING A CLOCK SWITCH
HS, HSPLL, XT, XTPLL
HS, HSPLL, XT, XTPLL
Clock Mode
EC, ECPLL
EC, ECPLL
EC, ECPLL
EC, ECPLL
SOSC
SOSC
Advance Information
// write invlid key to force lock
// Write Key1 to SYSKEY
// Write Key2 to SYSKEY
// OSCCON is now unlocked
// make the desired change
// This can be in ‘C’ or assembly
// clear the PLL multiplier bits
// set he new PLL multiplier value
// request clock switch
// Relock the SYSKEY
// Write any value other than Key1 or Key2
// OSCCON is relocked
COSC<2:0>, POSCMD<1:0>
Configuration Bit FIeld
COSC<2:0>, POSCMD,
COSC<2:0>, POSCMD,
COSC<2:0>, POSCMD,
used as SYSCLK, such as after a clock switch, it can-
not be disabled by writing to the SOSCEN bit. If the
SOSC is enabled by the SOSCEN bit, it will continue to
operate when the device is in SLEEP. To prevent inad-
vertent clock changes the OSCCON register is locked.
It must be unlocked prior to software enabling or
disabling the SOSC.
10.3
The pins used by the POSC and SOSC are shared by
other peripherals modules. Table shows the function of
these shared pins in the available oscillator modes.
When the pins are not used by a oscillator they are
available for use as general I/O pins or by use by a
peripheral sharing the pin. .
COSC<2:0>, POSCMD
COSC<2:0>, POSCMD
COSC<2:0>
COSC<2:0>
COSC<2:0>
COSC<2:0>
COSC<2:0>
COSC<2:0>
OSCOFNC
OSCOFNC
OSCOFNC
PIC32MX FAMILY
Input/Output Pins
(1)
O
I
TRIS
NPUT
UTPUT
X
X
X
X
X
X
X
X
X
X
DS61143A-page 225
PBCLK O
Pin Type
C
O
LOCK
I
GPIO
GPIO
GPIO
GPIO
OSC
OSC
OSC
OSC
NPUT
UTPUT
I
N
UT

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