pic32mx320f064h Microchip Technology Inc., pic32mx320f064h Datasheet - Page 391
pic32mx320f064h
Manufacturer Part Number
pic32mx320f064h
Description
64/100-pin General Purpose, 32-bit Flash Microcontrollers
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC32MX320F064H.pdf
(544 pages)
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20.3.5
In addition to the PMP interrupt, a BUSY bit is
provided to indicate the status of the module. This bit
is only used in Master modes.
While any read or write operation is in progress, the
BUSY bit is set for all but the very last peripheral bus-
cycle of the operation. While the bit is set, any request
by the user to initiate a new operation will be ignored
(i.e., writing or reading the PMDIN register will not ini-
tiate either a read nor a write).
EXAMPLE 20-2:
In most applications, the PMP’s chip select pin(s) pro-
vide the chip select interface and are under the timing
control of the PMP module. However, some applica-
tions may require the PMP chip select pin(s) not be
configured as a chip select, but as a high-order address
line, such as PMA<14> or PMA<15>. In this situation,
the application’s chip select function must be provided
by an available I/O port pin under software control. In
these cases, it is especially important that the user’s
software poll the BUSY bit to ensure any read or write
operation is complete before de-asserting the software
controlled chip select.
The following example illustrates a common technique.
© 2007 Microchip Technology Inc.
/*An generic C example PMP write function
*/
pmpWrite(unsigned int value)
{
}
/*An MPLAB C32 example PMP write function
*/
pmpWrite(unsigned int value)
{
}
utilizing the BUSY bit.
utilizing BUSY bit.
while(PMMODE & 0x8000);
PMDIN = value;
while(PMMODEbits.BUSY); // PMP busy?
PMDIN = value;
PARALLEL MASTER PORT STATUS
POLLING THE BUSY FLAG
// perform write
// perform write
// PMP busy?
Advance Information
If a large number of wait-states are used, or if the
PBCLK clock is operating slower than the SYSCLK
clock, it is possible for the PMP module to be in the pro-
cess of completing a read or write operation when the
next CPU instruction is attempting to read or write the
PMP module. For this reason, it is highly recommended
that the PMP’s BUSY bit be checked prior to any read
or write operation and any user operation that modifies
the PMADDR address register. See the following code
example.
PIC32MX FAMILY
DS61143A-page 389
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