pic32mx320f064h Microchip Technology Inc., pic32mx320f064h Datasheet - Page 229

• Manufacturer Part Number: pic32mx320f064h
• Description: 64/100-pin General Purpose, 32-bit Flash Microcontrollers
• Manufacturer: Microchip Technology Inc.

11.0
This section describes power saving for the PIC32MX
family. The PIC32MX family devices offer a total of nine
methods and modes that are organized into two cate-
gories that allow the user to balance power consump-
tion with device performance. In all of the methods and
modes described in this section, power saving is
controlled by software.
11.1
When the CPU is running, power consumption can be
controlled by reducing the CPU clock frequency, lower-
ing the PB
These methods are grouped into the following catego-
ries:
• FRC RUN mode: the CPU is clocked from the FRC
• LPRC RUN mode: the CPU is clocked from the
• SOSC RUN mode: the CPU is clocked from the
• Peripheral Bus Scaling mode:
© 2007 Microchip Technology Inc.
Note:
clock source with or without postscalers.
LPRC clock source.
SOSC clock source.
Peripherals are clocked at programmable fraction
of the CPU clock (SYSCLK).
POWER SAVING
Power Saving with CPU Running
CLK
Reference Manual” (DS61132) for a
This data sheet summarizes the features of
the PIC32MX family of devices. It is not
intended to be a comprehensive reference
source. Refer to the “PIC32MX Family
detailed description of this peripheral.
, and by individually disabling modules.
Advance Information
11.2
The device supports two power-saving modes, SLEEP
and IDLE, both of which halt the clock to the CPU.
These modes operate with all clock sources, as listed
below:
• POSC IDLE Mode: the system clock is derived
• FRC IDLE Mode: the system clock is derived from
• SOSC IDLE Mode: the system clock is derived
• LPRC IDLE Mode: the system clock is derived from
• SLEEP Mode: the CPU, the system clock source,
from the POSC. The system clock source
continues to operate.
Peripherals continue to operate, but can
optionally be individually disabled.
the FRC with or without postscalers.
Peripherals continue to operate, but can option-
ally be individually disabled.
from the SOSC.
Peripherals continue to operate, but can
optionally be individually disabled.
the LPRC.
Peripherals continue to operate, but can option-
ally be individually disabled. This is the lowest
power mode for the device with a clock running.
and any peripherals that operate from the system
clock source, are halted.
Some peripherals can operate in SLEEP using
specific clock sources. This is the lowest power
mode for the device.
PIC32MX FAMILY
CPU Halted Methods
DS61143A-page 227