pic32mx320f064h Microchip Technology Inc., pic32mx320f064h Datasheet - Page 352

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pic32mx320f064h

Manufacturer Part Number
pic32mx320f064h
Description
64/100-pin General Purpose, 32-bit Flash Microcontrollers
Manufacturer
Microchip Technology Inc.
Datasheet

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PIC32MX FAMILY
REGISTER 18-2:
DS61143A-page 350
bit 31
bit 23
bit 15
bit 7
Legend:
R = Readable bit
U = Unimplemented bit
bit 31-16
bit 15
bit 14
bit 13-11
bit 10
bit 9
bit 8
bit 7
ACKSTAT
IWCOL
R/W-0
U-0
U-0
R-0
Unimplemented: Read as ‘0’
ACKSTAT: Acknowledge Status bit
In both I
1 = Acknowledge was not received
0 = Acknowledge was received
TRSTAT: Transmit Status bit
In I
1 = Master transmit is in progress (8 bits + ACK)
0 = Master transmit is not in progress
Unimplemented: Read as ‘0’
BCL: Master Bus Collision Detect bit
Cleared when the I
1 = A bus collision has been detected during a master operation
0 = No collision has been detected
GCSTAT: General Call Status bit
Cleared after Stop detection.
1 = General call address was received
0 = General call address was not received
ADD10: 10-bit Address Status bit
Cleared after Stop detection.
1 = 10-bit address was matched
0 = 10-bit address was not matched
IWCOL: Write Collision Detect bit
1 = An attempt to write the I2CxTRN register collided because the I
0 = No collision
TRSTAT
I2COV
2
R/W-0
C Master mode only; applicable to Master Transmit mode.
Must be cleared in software.
U-0
U-0
R-0
I2C
2
C Master and Slave modes; applicable to both transmit and receive.
X
STAT: I
W = Writable bit
-n = Bit Value at POR: (‘0’, ‘1’, x = Unknown)
2
2
D/A
U-0
U-0
U-0
R-0
C module is disabled (ON = 0).
C STATUS REGISTER
Advance Information
R/W-0
U-0
U-0
U-0
P
P = Programmable bit
R/W-0
U-0
U-0
U-0
S
R/W-0
R/W
BCL
U-0
U-0
R-0
2
C module is busy.
© 2007 Microchip Technology Inc.
r = Reserved bit
GCSTAT
RBF
U-0
U-0
R-0
R-0
ADD10
TBF
U-0
U-0
R-0
R-0
bit 24
bit 16
bit 8
bit 0

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