pic32mx320f064h Microchip Technology Inc., pic32mx320f064h Datasheet - Page 351

• Manufacturer Part Number: pic32mx320f064h
• Description: 64/100-pin General Purpose, 32-bit Flash Microcontrollers
• Manufacturer: Microchip Technology Inc.

REGISTER 18-1:
© 2007 Microchip Technology Inc.
bit 10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
A10M: 10-bit Slave Address Flag bit
1 = I2CxADD is a 10-bit slave address
0 = I2CADD is a 7-bit slave address
DISSLW: Slew Rate Control Disable bit
1 = Slew rate control disabled for Standard Speed mode (100 kHz); also disabled for 1 MHz mode
0 = Slew rate control enabled for High-Speed mode (400 kHz)
SMEN: SMBus Input Levels Disable bit
1 = Enable input logic so that thresholds are compliant with SMBus specification
0 = Disable SMBus specific inputs
GCEN: General Call Enable bit
In I
1 = Enable interrupt when a general call address is received in I2CSR. Module is enabled for
0 = General call address disabled
STREN: SCL Clock Stretch Enable bit
In I
1 = Enable clock stretching
0 = Disable clock stretching
ACKDT: Acknowledge Data bit
In I
user initiates an Acknowledge sequence at the end of a receive.
1 = A NACK is sent
0 = ACK is sent
ACKEN: Acknowledge Sequence Enable bit
In I
1 = Initiate Acknowledge sequence on SDA and SCL pins, and transmit ACKDT data bit; cleared by
0 = Acknowledge sequence idle
RCEN: Receive Enable bit
In I
1 = Enables Receive mode for I
0 = Receive sequence not in progress
PEN: Stop Condition Enable bit
In I
1 = Initiate Stop condition on SDA and SCL pins; cleared by module
0 = Stop condition idle
RSEN: Restart Condition Enable bit
In I
1 = Initiate Restart condition on SDA and SCL pins; cleared by module
0 = Restart condition idle
SEN: Start Condition Enable bit
In I
1 = Initiate Start condition on SDA and SCL pins; cleared by module
0 = Start condition idle
2
2
2
2
2
2
2
2
C Slave mode only
C Slave mode only; used in conjunction with SCLREL bit.
C Master mode only; applicable during master receive
C Master mode only.
C Master mode only.
C Master mode only.
C Master mode only.
C Master mode only; applicable during master receive. Value that will be transmitted when the
reception
module
I2C
X
CON: I
2
C™ CONTROL REGISTER (CONTINUED)
Advance Information
2
C, automatically cleared by module at end of 8-bit receive data byte
PIC32MX FAMILY
DS61143A-page 349