pic32mx320f064h Microchip Technology Inc., pic32mx320f064h Datasheet - Page 77

• Manufacturer Part Number: pic32mx320f064h
• Description: 64/100-pin General Purpose, 32-bit Flash Microcontrollers
• Manufacturer: Microchip Technology Inc.

REGISTER 5-7:
© 2007 Microchip Technology Inc.
bit 31
bit 23
bit 15
bit 7
Legend:
R = Readable bit
U = Unimplemented bit
bit 31-9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1-0
R/W-0
CHEN
U-0
U-0
U-0
—
—
—
Unimplemented: Read as ‘0’
CHCHNS: Chain Channel Selection bit
1 = Chain to channel lower in natural priority (CH1 will be enabled by CH2 transfer complete)
0 = Chain to channel higher in natural priority (CH1 will be enabled by CH0 transfer complete)
Note: The chain selection bit takes effect when chaining is enabled, i.e., CHCHN = 1.
CHEN: Channel Enable bit
1 = Channel is enabled
0 = Channel is disabled
CHAED: Channel Allow Events If Disabled bit
1 = Channel start/abort events will be registered, even if the channel is disabled
0 = Channel start/abort events will be ignored if the channel is disabled
CHCHN: Channel Chain Enable bit
1 = Allow channel to be chained to channel higher in natural priority
0 = Do not chain to channel higher in natural priority
CHAEN: Channel Automatic Enable bit
1 = Channel is continuously enabled, and not automatically disabled after a block transfer is complete
0 = Channel is disabled on block transfer complete
CHXM: Channel Extended Addressing Mode Enable bit
1 = Extended Addressing mode is enabled
0 = Extended Addressing mode is disabled
CHEDET: Channel Event Detected bit
1 = An event has been detected
0 = No events have been detected
CHPRI<1:0>: Channel Priority bits
11 = Channel has priority 3 (highest)
10 = Channel has priority 2
01 = Channel has priority 1
00 = Channel has priority 0
CHAED
R/W-0
U-0
U-0
U-0
—
—
—
DCHXCON: DMA CHANNEL X CONTROL REGISTER
W = Writable bit
-n = Bit Value at POR: (‘0’, ‘1’, x = Unknown)
CHCHN
R/W-0
U-0
U-0
U-0
—
—
—
Advance Information
CHAEN
R/W-0
U-0
U-0
U-0
—
—
—
CHXM
R/W-0
U-0
U-0
U-0
—
—
—
PIC32MX FAMILY
CHEDET
U-0
U-0
U-0
R-0
—
—
—
R/W-0
U-0
U-0
U-0
—
—
—
CHPRI<1:0>
DS61143A-page 75
CHCHNS
R/W-0
R/W-0
U-0
U-0
—
—
bit 24
bit 16
bit 8
bit 0