pic32mx320f064h Microchip Technology Inc., pic32mx320f064h Datasheet - Page 47

• Manufacturer Part Number: pic32mx320f064h
• Description: 64/100-pin General Purpose, 32-bit Flash Microcontrollers
• Manufacturer: Microchip Technology Inc.

REGISTER 4-3:
© 2007 Microchip Technology Inc.
bit 31
bit 23
bit 15
bit 7
Legend:
R = Readable bit
U = Unimplemented bit
bit 31
bit 30-24
bit 23-4
bit 3
bit 2
bit 1
bit 0
Note 1: The TAG and Status of the Line pointed to by CHEIDX (CHEACC<3:0>).
LTAGBOOT
R/W-0
R/W-x
R/W-x
R/W-x
LTAGBOOT: Line TAG Address Boot
1 = The line is in the 0x1D000000 (physical) area of memory
0 = The line is in the 0x1FC00000 (physical) area of memory
Unimplemented: Read as ‘0’
LTAG<23:4>: Line TAG Address bits
LTAG bits are compared against physical address <23:4> to determine a hit. Because its address
range and position of Flash in kernel space and user space, the LTAG Flash address is identical for
virtual addresses, (system) physical addresses, and Flash physical addresses.
LVALID: Line Valid bit
1 = The line is valid and is compared to the physical address for hit detection
0 = The line is not valid and is not compared to the physical address for hit detection
LLOCK: Line Lock bit
1 = The line is locked and will not be replaced
0 = The line is not locked and can be replaced
LTYPE: Line Type bit
1 = The line caches instruction words
0 = The line caches data words
Reserved:
R/W-x
R/W-x
R/W-x
U-0
—
CHETAG
LTAG<7:4>
W = Writable bit
-n = Bit Value at POR: (‘0’, ‘1’, x = Unknown)
(1)
R/W-x
R/W-x
R/W-x
: CACHE TAG REGISTER
U-0
—
Advance Information
R/W-x
R/W-x
R/W-x
U-0
—
LTAG<23:16>
LTAG<15:8>
P = Programmable bit
LVALID
R/W-0
R/W-x
R/W-x
U-0
—
PIC32MX FAMILY
LLOCK
R/W-x
R/W-x
R/W-0
U-0
—
r = Reserved bit
LTYPE
R/W-1
R/W-x
R/W-x
U-0
—
DS61143A-page 45
R/W-x
R/W-x
U-0
r-0
—
—
bit 24
bit 16
bit 8
bit 0