s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 107

• Manufacturer Part Number: s3c72m9
• Description: The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
• Manufacturer: Samsung Semiconductor, Inc.

S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
Reducing Instruction Redundancy
When redundant instructions such as LD A,#im and LD EA,#imm are used consecutively in a program sequence,
only the first instruction is executed. The redundant instructions which follow are ignored, that is, they are handled
like a NOP instruction. When LD HL,#imm instructions are used consecutively, redundant instructions are also
ignored.
In the following example, only the 'LD A, #im' instruction will be executed. The 8-bit load instruction which follows it is
interpreted as redundant and is ignored:
LD
LD
In this example, the statements 'LD A,#2H' and 'LD A,#3H' are ignored:
BITR
LD
LD
LD
LD
If consecutive LD HL, #imm instructions (load 8-bit immediate data to the 8-bit memory pointer pair, HL) are
detected, only the first LD is executed and the LDs which immediately follow are ignored. For example,
LD
LD
LD
LD
LD
If an instruction reference with a REF instruction has a redundancy effect, the following conditions apply:
— If the instruction preceding the REF has a redundancy effect, this effect is canceled and the referenced
— If the instruction following the REF has a redundancy effect, the instruction following the REF is skipped.
F
ABC
instruction is not skipped.
Programming Tip — Example of the Instruction Redundancy Effect
A,#im
EA,#imm
EMB
A,#1H
A,#2H
A,#3H
23H,A
HL,#10H
HL,#20H
A,#3H
EA,#35H
@HL,A
ORG
LD
ORG
•
•
•
LD
REF
•
•
•
REF
LD
0020H
EA,#30H
0080H
EA,#40H
ABC
ABC
EA,#50H
; Load 4-bit immediate data (#im) to accumulator
; Load 8-bit immediate data (#imm) to extended
; accumulator
; Execute instruction
; Ignore, redundant instruction
; Ignore, redundant instruction
; Execute instruction, 023H
; HL
; Ignore, redundant instruction
; A
; Ignore, redundant instruction
; (10H)
; Stored in REF instruction reference area
; Redundancy effect is encountered
; No skip (EA
; EA
; Skip
3H
10H
3H
#30H
#30H)
#1H
SAM47 INSTRUCTION SET
5-3