s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 37

• Manufacturer Part Number: s3c72m9
• Description: The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
• Manufacturer: Samsung Semiconductor, Inc.

S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
ERB FLAG (ERB)
The 1-bit register bank enable flag (ERB) determines the range of addressable working register area. When the ERB
flag is "1", the working register area from register banks 0 to 3 is selected according to the register bank selection
register (SRB). When the ERB flag is "0", register bank 0 is the selected working register area, regardless of the
current value of the register bank selection register (SRB).
When an internal RESET is generated, bit 6 of program memory address 0000H is written to the ERB flag. This
automatically initializes the flag. When a vectored interrupt is generated, bit 6 of the respective address table in
program memory is written to the ERB flag, setting the correct flag status before the interrupt service routine is
executed.
During the interrupt routine, the ERB value is automatically pushed to the stack area along with the other PSW bits.
Afterwards, it is popped back to the FB0H.0 bit location. The initial ERB flag settings for each vectored interrupt are
defined using VENTn instructions.
F
ERB flag settings for register bank selection:
1. When ERB = "0":
2. When ERB = "1":
PROGRAMMING TIP — Using the ERB Flag to Select Register Banks
SRB
LD
LD
SRB
LD
SRB
LD
SRB
LD
LD
SRB
LD
SRB
LD
1
EA,#34H
HL,EA
2
YZ,EA
3
WX,EA
1
EA,#34H
HL,EA
2
YZ,EA
3
WX,EA
; Register bank 0 is selected (since ERB = "0", the
; SRB is configured to bank 0)
; Bank 0 EA
; Bank 0 HL
; Register bank 0 is selected
; Bank 0 YZ
; Register bank 0 is selected
; Bank 0 WX
; Register bank 1 is selected
; Bank 1 EA
; Bank 1 HL
; Register bank 2 is selected
; Bank 2 YZ
; Register bank 3 is selected
; Bank 3 WX
EA
EA
Bank 1 EA
BANK2 EA
#34H
#34H
EA
Bank 3 EA
ADDRESS SPACES
2-21