s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 293

• Manufacturer Part Number: s3c72m9
• Description: The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
• Manufacturer: Samsung Semiconductor, Inc.

S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
TIMERS and TIMER/COUNTERS
TC1A REFERENCE REGISTER (TREF1A)
The TC1A reference register TREF1A is a 8-bit write-only register that is mapped to RAM locations FA9H–FA8H. It
is addressable by 8-bit RAM control instructions. RESET clears the TREF1A value to 'FFH'.
TREF1A is used to store a reference value to be compared to the incrementing TCNT1A register in order to identify
an elapsed time interval. Reference values will differ depending upon the specific function that TC1A is being used to
perform — as a programmable timer/counter, event counter, clock signal divider, or arbitrary frequency output
source.
During timer/counter operation, the value loaded into the reference register compared to the TCNT1A value. When
TCNT1A = TREF1A, the TC1A output latch (TOL1) is inverted and an interrupt request is generated to signal the
interval or event. The TREF1A value, together with the TMOD1A clock frequency selection, determines the specific
TC1A timer interval. Use the following formula to calculate the correct value to load to the TREF1A reference register:
1
TC1A timer interval = (TREF1A value + 1)
TMOD1A frequency setting
(TREF1A value
0)
TC1A OUTPUT ENABLE FLAG (TOE1)
The 1-bit timer/counter 1 output enable flag TOE1 flag controls output from timer/counter 1 to the TCLO1 pin. TOE1
is addressable by 1-bit read and write instructions.
Bit 3
Bit 2
Bit 1
Bit 0
F92H
TOE1
TOE0
"0"
TOL2
When you set the TOE1 flag to "1", the contents of TOL1 can be output to the TCLO1 pin. Whenever a RESET
occurs, TOE1 is automatically set to logic zero, disabling all TC1A output.
TC1A OUTPUT LATCH (TOL1)
TOL1 is the output latch for timer/counter 1. When the 8-bit comparator detects a correspondence between the value
of the counter register TCNT1A and the reference value stored in the TREF1A register, the TOL1 logic toggles high-
to-low or low-to-high. Whenever the state of TOL1 is switched, the TC1A signal exits the latch for output. TC1A
output is directed (if TOE1 = "1") to the TCLO1 pin at I/O port 3.1.
When timer/counter 1 is started, (TMOD1A.3 = "0"), the contents of the output latch are cleared automatically.
However, when TC1A is disabled (TMOD1A.2 = "0"), the contents of the TOL1 latch are retained.
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