s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 198

• Manufacturer Part Number: s3c72m9
• Description: The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
• Manufacturer: Samsung Semiconductor, Inc.

SAM47 INSTRUCTION SET
XCHI —
XCHI
Operation:
Description:
Example:
5-94
Register pair HL contains the address 2FH and internal RAM location 2FH contains 0FH:
YYY XCHI
The 'JPS YYY' instruction is executed since a skip occurs after the XCHI instruction.
Exchange and Increment
dst,src
The instruction XCHI exchanges the contents of the accumulator with the RAM location addressed
by register pair HL and then increments the contents of register L. If the content of register L is 0H,
a skip is executed. The value of the carry flag is not affected.
Operand
Operand
A,@HL
A,@HL
LD
LD
XCHI A,@HL ;
JPS
JPS
A,@HL
•
•
•
Exchange A and data memory contents; increment
contents of register L and skip on overflow
0
1
HL,#2FH
A,#0H
XXX
YYY
1
Binary Code
Operation Summary
1
A
; Skipped since an overflow occurred
; H
; (20H)
1
0FH and L
0
2H, L
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
0FH, A
1
0H
0
L + 1 = 0, (HL)
A
skip if L = 0H
(20H), L
(HL), then L
Operation Notation
L + 1 = 1H
Bytes
"0"
1
L+1;
Cycles
2 + S