s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 155

• Manufacturer Part Number: s3c72m9
• Description: The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
• Manufacturer: Samsung Semiconductor, Inc.

S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
DI —
DI
Operation:
Description:
Example:
Disable Interrupts
Bit 3 of the interrupt priority register IPR, IME, is cleared to logic zero, disabling all interrupts.
Interrupts can still set their respective interrupt status latches, but the CPU will not directly service
them.
If the IME bit (bit 3 of the IPR) is logic one (e.g., all instructions are enabled), the instruction
DI
sets the IME bit to logic zero, disabling all interrupts.
Operand
Operand
–
–
1
1
1
0
1
1
Binary Code
Operation Summary
Disable all interrupts
1
1
1
0
1
0
1
1
0
0
IME
0
Operation Notation
SAM47 INSTRUCTION SET
Bytes
2
Cycles
2
5-51