s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 260

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s3c72m9

Manufacturer Part Number
s3c72m9
Description
The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
TIMERS and TIMER/COUNTERS
TC0 ENABLE/DISABLE PROCEDURE
Enable Timer/Counter 0
— Set TMOD0.2 to logic one
— Set the TC0 interrupt enable flag IET0 to logic one
— Set TMOD0.3 to logic one
TCNT0, IRQT0, and TOL0 are cleared to logic zero, and timer/counter operation starts.
Disable Timer/Counter 0
— Set TMOD0.2 to logic zero
Clock signal input to the counter register TCNT0 is halted. The current TCNT0 value is retained and can be read if
necessary.
11-12
TCLO0
TCL0
8
NOTE:
TMOD0.7
TMOD0.6
TMOD0.5
TMOD0.4
TMOD0.3
TMOD0.2
TMOD0.1
TMOD0.0
The CL signal is selected for output if LCON.3 is logic "1" otherwise,
it is selected the other signal.
PM3.0
Selector
Clock
(fxx/2
Clear
Figure 11-2. TC0 Circuit Diagram
10
P3.0 Latch
IRQT0
, fxx/2
Clocks
6
Set
, fxx/2
4
, fxx)
Selector
TCNT0
TCNT0
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
8
Clear
CL
Clear
Comparator
TOE0
TOL0
8-Bit
Inverted
TREF0
8

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