s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 191

• Manufacturer Part Number: s3c72m9
• Description: The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
• Manufacturer: Samsung Semiconductor, Inc.

S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
SRB —
SRB
Operation:
Description:
Example:
Select Register Bank
n
The SRB instruction selects one of four register banks in the working register memory area. The
constant value used with SRB is 0, 1, 2, or 3. The following table shows the effect of SRB settings:
NOTE:
The enable register bank flag (ERB) must always be set for the SRB instruction to execute
successfully for register banks 0, 1, 2, and 3. In addition, if the ERB value is logic zero, register
bank 0 is always selected, regardless of the SRB value.
If the ERB flag is set, the instruction
SRB
selects register bank 3 (018H–01FH) as the working memory register bank.
ERB Setting
Operand
Operand
n
0
1
n
'x' means don't care.
3
1
0
3
0
0
1
1
0
0
Binary Code
Operation Summary
SRB Settings
2
0
0
Select register bank
1
1
1
0
1
0
1
x
0
0
1
1
d1
0
d0
1
0
x
0
1
0
1
SRB
Always set to bank 0
Bank 0
Bank 1
Bank 2
Bank 3
Operation Notation
Selected Register Bank
n (n = 0, 1, 2, 3)
SAM47 INSTRUCTION SET
Bytes
2
Cycles
2
5-87