s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 34

• Manufacturer Part Number: s3c72m9
• Description: The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
• Manufacturer: Samsung Semiconductor, Inc.

ADDRESS SPACES
PROGRAM COUNTER (PC)
A 15-bit program counter (PC) stores addresses for instruction fetches during program execution. Whenever a reset
operation or an interrupt occurs, bits PC13 through PC0 are set to the vector address.
Usually, the PC is incremented by the number of bytes of the instruction being fetched. One exception is the 1-byte
REF instruction which is used to reference instructions stored in the ROM.
PROGRAM STATUS WORD (PSW)
The program status word (PSW) is an 8-bit word that defines system status and program execution status and
which permits an interrupted process to resume operation after an interrupt request has been serviced. PSW values
are mapped as follows:
The PSW can be manipulated by 1-bit or 4-bit read/write and by 8-bit read instructions, depending on the specific bit
or bits being addressed. The PSW can be addressed during program execution regardless of the current value of the
enable memory bank (EMB) flag.
Part or all of the PSW is saved to stack prior to execution of a subroutine call or hardware interrupt. After the in-
terrupt has been processed, the PSW values are popped from the stack back to the PSW address.
When a RESET is generated, the EMB and ERB values are set according to the RESET vector address, and the
carry flag is left undefined (or the current value is retained). PSW bits IS0, IS1, SC0, SC1, and SC2 are all cleared to
logical zero.
2-18
FB0H
FB1H
PSW Bit Identifier
SC2, SC1, SC0
IS1, IS0
EMB
ERB
C
(MSB)
IS1
C
Interrupt status flags
Enable memory bank flag
Enable register bank flag
Carry flag
Program skip flags
SC2
Table 2-5. Program Status Word Bit Descriptions
IS0
Description
EMB
SC1
(LSB)
ERB
SC0
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
Bit Addressing
1, 4
1
1
1
8
Read/Write
R/W
R/W
R/W
R/W
R