s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 267

• Manufacturer Part Number: s3c72m9
• Description: The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
• Manufacturer: Samsung Semiconductor, Inc.

S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
TC0 COUNTER REGISTER (TCNT0)
The 8-bit counter register for timer/counter 0, TCNT0, is read-only and can be addressed by 8-bit RAM control
instructions. RESET sets all TCNT0 register values to logic zero (00H).
Whenever TMOD0.3 is enabled, TCNT0 is cleared to logic zero and counting resumes. The TCNT0 register value is
incremented each time an incoming clock signal is detected that matches the signal edge and frequency setting of
the TMOD0 register (specifically, TMOD0.6, TMOD0.5, and TMOD0.4).
Each time TCNT0 is incremented, the new value is compared to the reference value stored in the TC0 reference
buffer, TREF0. When TCNT0 = TREF0, an overflow occurs in the TCNT0 register, the interrupt request flag, IRQT0, is
set to logic one, and an interrupt request is generated to indicate that the specified timer/counter interval has
elapsed.
TREF0
TCNT0
Timer Start Instruction
Count
Clock
TOL0
(TMOD0.3 is set)
0
1
2
Figure 11-3. TC0 Timing Diagram
n-1
IRQT0 Set
n
Reference Value = n
Match
0
1
Interval Time
2
n-1
IRQT0 Set
n
Match
TIMERS and TIMER/COUNTERS
0
1
2
3
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