s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 24

• Manufacturer Part Number: s3c72m9
• Description: The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
• Manufacturer: Samsung Semiconductor, Inc.

ADDRESS SPACES
Memory Banks 0, 1–13, 14, and 15
Bank 0
Bank 1–13
Bank 14
Bank 15
Data Memory Addressing Modes
The enable memory bank (EMB) flag controls the addressing mode for data memory banks 0, 1–13, 14, or 15. When
the EMB flag is logic zero, the addressable area is restricted to specific locations, depending on whether direct or
indirect addressing is used. With direct addressing, you can access locations 000H–07FH of bank 0 and bank 15.
With indirect addressing, only bank 0 (000H–0FFH) can be accessed. When the EMB flag is set to logic one, all
data memory banks can be accessed according to the current SMB value.
For 8-bit addressing, two 4-bit registers are addressed as a register pair. Also, when using 8-bit instructions to
address RAM locations, remember to use the even-numbered register address as the instruction operand.
Working Registers
The RAM working register area in data memory bank 0 is further divided into four register banks (bank 0, 1, 2, and
3). Each register bank has eight 4-bit registers and paired 4-bit registers are 8-bit addressable.
Register A is used as a 4-bit accumulator and register pair EA as an 8-bit extended accumulator. The carry flag bit
can also be used as a 1-bit accumulator. Register pairs WX, WL, and HL are used as address pointers for indirect
addressing. To limit the possibility of data corruption due to incorrect register addressing, it is advisable to use
register bank 0 for the main program and banks 1, 2, and 3 for interrupt service routines.
LCD Data Register Area
Bit values for LCD segment data are stored in data memory bank 14. Register locations in this area that are not
used to store LCD data can be assigned to general-purpose use.
2-8
(000H–0FFH)
(X00H–XFFH)
(E00H–EFFH)
(F80H–FFFH)
The lowest 32 nibbles of bank 0 (000H–01FH) are used as working registers; the
next 224 nibbles (020H–0FFH) can be used both as stack area and as general-
purpose data memory. Use the stack area for implementing subroutine calls and
returns, and for interrupt processing.
Bank 1–13 are used for general-purpose. Where X is 1-D.
The 256
Detailed map on bank 14 is shown in Section 12 LCD Controller/Driver.
The microcontroller uses bank 15 for memory-mapped peripheral I/O. Fixed RAM
locations for each peripheral hardware address are mapped into this area.
5-bits of bank 14 are for display registers or general-purpose use;
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)