s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 202

• Manufacturer Part Number: s3c72m9
• Description: The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
• Manufacturer: Samsung Semiconductor, Inc.

OSCILLATOR CIRCUITS
Using a Subsystem Clock
If a subsystem clock is being used for an application, the idle power-down mode can be initiated by executing an
IDLE instruction. Since the subsystem clock source cannot be stopped internally, you cannot, however, use a
STOP instruction to enable the stop power-down mode.
The watch timer, buzzer and LCD display operate normally with a subsystem clock source, since they operate at
very slow speeds and with very low power consumption (as low as 122 µs at 32.768 kHz). Other hardware such as
the basic timer, timer/counters 0 and 1, and the serial I/O interface should not be driven using the subsystem clock,
since they require higher operating speeds for normal performance.
6-2
Stop
Idle
X
IN
Main-system
Oscillator
Circuit
SCMOD.3
SCMOD.0
SCMOD.2
PCON.0
PCON.1
PCON.2
PCON.3
Oscillator
X
OUT
Stop
PCON.3, .2 clear
Figure 6-1. Clock Circuit Diagram
fx
1/2
1/1-1/4096
Frequency
fxx
Selector
Dividing
Circuit
1/16
Oscillator
Control
Circuit
fx/1, 2, 16
fxt
Selector
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
CPU stop signal
Oscillator
(IDLE mode)
Stop
Selector
fx: Main-system clock
fxt: Sub-system clock
fxx: Selected system clock
fxt
Wait release signal
Internal RESET signal
Power down release signal
XT
IN
Basic Timer
Timer/Counter0 and 1 (A/B)
Watch Timer
LCD Controller
Clock Output Circuit
Sub-system
Oscillator
Circuit
1/4
XT
CPU Clock
OUT
Watch Timer
LCD Controller