s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 207

• Manufacturer Part Number: s3c72m9
• Description: The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
• Manufacturer: Samsung Semiconductor, Inc.

S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
SWITCHING THE CPU CLOCK
Together, bit settings in the power control register, PCON, and the system clock mode register, SCMOD, determine
whether a main system or a subsystem clock is selected as the CPU clock, and also how this frequency is to be
divided. This makes it possible to switch dynamically between main and subsystem clocks and to modify operating
frequencies.
SCMOD.3 and SCMOD.0 select the main system clock (fx) or a subsystem clock (fxt) and start or stop main
system clock oscillation. PCON.1 and PCON.0 control the frequency divider circuit, and divide the selected fx clock
by 4, 8, or 64,or fxt clock by 4.
For example, you are using the default CPU clock (normal operating mode and a main system clock of fx/64) and
you want to switch from the fx clock to a subsystem clock and to stop the main system clock. To do this, you first
need to set SCMOD.0 to "1". This switches the clock from fx to fxt but allows main system clock oscillation to
continue. Before the switch actually goes into effect, a certain number of machine cycles must elapse. After this
time interval, you can then disable main system clock oscillation by setting SCMOD.3 to "1".
This same 'stepped' approach must be taken to switch from a subsystem clock to the main system clock: first,
clear SCMOD.3 to "0" to enable main system clock oscillation. Then, after a certain number of machine cycles has
elapsed, select the main system clock by clearing all SCMOD values to logic zero.
Following a RESET, CPU operation starts with the lowest main system clock frequency of 15.3 µsec at 4.19 MHz
after the standard oscillation stabilization interval of 31.3 ms has elapsed. Table 6-5 details the number of machine
cycles that must elapse before a CPU clock switch modification goes into effect.
NOTES:
1.
2.
3.
4.
SCMOD.0 = 0
SCMOD.0 = 1
BEFORE
A clock switch operation does not go into effect immediately when you make the SCMOD and PCON
register modifications — the previously selected clock continues to run for a certain number of machine
cycles.
Even if oscillation is stopped by setting SCMOD.3 during main system clock operation, the stop mode is not entered.
Since the X
not set SCMOD.3 to "1" when an external clock is used as the main system clock.
When the system clock is switched to the subsystem clock, it is necessary to disable any interrupts which may occur
during the time intervals shown in Table 6-5.
'N/A' means 'not available'.
IN
PCON.1 = 0
PCON.0 = 0
PCON.1 = 1
PCON.0 = 0
PCON.1 = 1
PCON.0 = 1
input is connected internally to V
AFTER
Table 6-5. Elapsed Machine Cycles During CPU Clock Switch
PCON.1 = 0
16 MACHINE CYCLES
8 MACHINE CYCLES
N/A
N/A
PCON.0 = 0
SS
to avoid current leakage due to the crystal oscillator in stop mode, do
PCON.1 = 1
NOTE
16 MACHINE CYCLES
1 MACHINE CYCLE
SCMOD.0 = 0
N/A
N/A
PCON.0 = 0
PCON.1 = 1
8 MACHINE CYCLES
1 MACHINE CYCLE
fx / 4fxt (M/C)
N/A
PCON.0 = 1
OSCILLATOR CIRCUITS
SCMOD.0 = 1
fx / 4fxt
N/A
N/A
N/A
6-7