s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 371

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s3c72m9

Manufacturer Part Number
s3c72m9
Description
The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
OPERATING MODE CHARACTERISTICS
When 12.5 V is supplied to the V
operating mode (read, write, or read protection) is selected according to the input signals to the pins listed in Table
17-3 below.
NOTE:
Program Memory
Operating Voltage (V
OTP Programming Mode
Pin Configuration
EPROM Programmability
Main Chip
Pin Name
V
RESET
V
5 V
TEST
DD
P0.2
P0.3
DD
/V
"0" means Low level; "1" means High level.
Characteristic
SS
(TEST)
12.5 V
12.5 V
12.5 V
V
5 V
PP
Table 17-2. Comparison of S3P72M9 and S3C72M5/C72M7/C72M9 Features
V
Pin Name
V
PP
RESET
DD
SDAT
SCLK
DD
Table 17-1. Descriptions of Pins Used to Read/Write the EPROM
(TEST)
)
/V
SS
REG/
MEM
0
0
0
1
PP
Table 17-3. Operating Mode Selection Criteria
32-Kbyte EPROM
1.8 V to 5.5 V
V
128 QFP
User Program 1 time
DD
(TEST) pin of the S3P72M9, the EPROM programming mode is entered. The
= 5 V, VPP (TEST) = 12.5V
Pin No.
20/21
18
19
24
27
Address
(A15-A0)
0E3FH
0000H
0000H
0000H
S3P72M9
During Programming
I/O
I/O
I/O
I
I
I
R/W
Serial data pin. Output port when reading and
input port when writing. Can be assigned as a
Input/push-pull output port.
Serial clock pin. Input only pin.
Power supply pin for EPROM cell writing
(indicates that OTP enters into the writing mode).
When 12.5 V is applied, OTP is in writing mode
and when 5 V is applied, OTP is in reading mode.
(Option)
Chip Initialization
Logic power supply pin. V
V during programming.
1
0
1
0
EPROM read
EPROM program
EPROM verify
EPROM read protection
16/24/32-Kbyte mask ROM
1.8 V to 5.5 V
128 QFP
Programmed at the factory
Function
S3C72M5/C72M7/C72M9
DD
Mode
should be tied to +5
S3P72M9 OTP
17-3

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