s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 184

• Manufacturer Part Number: s3c72m9
• Description: The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
• Manufacturer: Samsung Semiconductor, Inc.

SAM47 INSTRUCTION SET
RET —
RET
Operation:
Description:
Example:
5-80
Return from Subroutine
RET pops the PC values successively from the stack, incrementing the stack pointer by six.
Program execution continues from the resulting address, generally the instruction immediately
following a CALL, LCALL, or CALLS.
The stack pointer contains the value 0FAH. RAM locations 0FAH, 0FBH, 0FCH, and 0FDH contain
1H, 0H, 5H, and 2H, respectively. The instruction
RET
leaves the stack pointer with the new value of 00H and program execution continues from location
0125H.
During a return from subroutine, PC values are popped from stack locations as follows:
SP + 1
SP + 2
SP + 3
SP + 4
SP + 5
SP + 6
SP
Operand
Operand
–
–
0
0
0
1
PC11 – PC8
PC3 – PC0
PC7 – PC4
0
0
PC14 – PC12
1
EMB
0
0
Binary Code
Return from subroutine
Operation Summary
0
ERB
0
0
1
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
0
1
PC14–8
PC7–0
EMB,ERB
SP
SP+6
Operation Notation
(SP+3) (SP+2)
(SP+1) (SP)
(SP+5) (SP+4)
Bytes
1
Cycles
3