s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 342
![no-image](/images/no-image-200.jpg)
s3c72m9
Manufacturer Part Number
s3c72m9
Description
The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.S3C72M9.pdf
(382 pages)
- Current page: 342 of 382
- Download datasheet (2Mb)
SERIAL I/O INTERFACE
F
3. Transmit and receive an internal clock frequency of 4.09 kHz (at 4.19 MHz) in LSB-first mode:
INTS
13-6
PROGRAMMING TIP — Setting Transmit/Receive Modes for Serial I/O (Continued)
BITR
LD
LD
LD
LD
LD
LD
EI
BITS
PUSH
PUSH
BITR
LD
XCH
LD
BITS
POP
POP
IRET
[[S3C72M5/C72M7/C72M9]]
SCK/P0.0
SO/P0.1
SI/P0.2
EMB
EA,#03H
PMG1,EA
EA,TDATA
SBUF,EA
EA,#8FH
SMOD,EA
IES
.
.
SB
EA
EMB
EA,TDATA
EA,SBUF
RDATA,EA
SMOD.3
EA
SB
; P0.0/SCK and P0.1/SO
; TDATA address = Bank0 (20H–7FH)
; SIO start
; SIO interrupt enable
; Store SMB, SRB
; Store EA
; EA
; TDATA address = Bank0 (20H–7FH)
; Transmit data
; RDATA address = Bank0 (20H–7FH)
; SIO start
External
Device
Transmit data
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
Receive data
Output, P0.2/SI
Input
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