s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 128

• Manufacturer Part Number: s3c72m9
• Description: The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
• Manufacturer: Samsung Semiconductor, Inc.

SAM47 INSTRUCTION SET
ADC —
ADC
Operation:
Description:
Examples:
5-24
1. The extended accumulator contains the value 0C3H, register pair HL the value 0AAH, and the
2. If the extended accumulator contains the value 0C3H, register pair HL the value 0AAH, and the
carry flag is cleared to "0":
Add with Carry
dst,src
The source operand, along with the setting of the carry flag, is added to the destination operand and
the sum is stored in the destination. The contents of the source are unaffected. If there is an
overflow from the most significant bit of the result, the carry flag is set; otherwise, the carry flag is
cleared.
If 'ADC A,@HL' is followed by an 'ADS A,#im' instruction in a program, ADC skips the ADS
instruction if an overflow occurs. If there is no overflow, the ADS instruction is executed normally.
(This condition is valid only for 'ADC A,@HL' instructions. If an overflow occurs following an 'ADS
A,#im' instruction, the next instruction will not be skipped.)
carry flag is set to "1":
Operand
Operand
SCF
ADC
JPS
RCF
ADC
JPS
RRb,EA
RRb,EA
A,@HL
EA,RR
A,@HL
EA,RR
EA,HL
XXX
EA,HL
XXX
Add indirect data memory to A with carry
Add register pair (RR) to EA with carry
Add EA to register pair (RRb) with carry
0
1
1
1
1
0
1
0
1
0
1
0
1
0
1
Binary Code
Operation Summary
1
1
0
1
0
; C
; EA
; Jump to XXX; no skip after ADC
; C
; EA
; Jump to XXX; no skip after ADC
1
1
1
1
0
r2
r2
1
1
1
"0"
"1"
0C3H + 0AAH + 1H = 6EH, C
0C3H + 0AAH + 0H = 6EH, C
S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
r1
r1
1
0
0
0
0
0
0
0
C, A
C, EA
C, RRb
Operation Notation
A + (HL) + C
EA + RR + C
RRb + EA + C
Bytes
1
2
2
"1"
"1"
Cycles
1
2
2