s3c72m9 Samsung Semiconductor, Inc., s3c72m9 Datasheet - Page 27

• Manufacturer Part Number: s3c72m9
• Description: The S3c72m5/s3c72m7/s3c72m9 Single-chip Cmos Microcontroller Has Been Designed For High Performance Using Samsung S
• Manufacturer: Samsung Semiconductor, Inc.

S3C72M5/C72M7/C72M9/P72M9 (Preliminary Spec)
Working Register Banks
For addressing purposes, the working register area is divided into four register banks — bank 0, bank 1, bank 2, and
bank 3. Any one of these banks can be selected as the working register bank by the register bank selection
instruction (SRB n) and by setting the status of the register bank enable flag (ERB).
Generally, working register bank 0 is used for the main program, and banks 1, 2, and 3 for interrupt service routines.
Following this convention helps to prevent possible data corruption during program execution due to contention in
register bank addressing.
NOTE:
Paired Working Registers
Each of the register banks is subdivided into eight 4-bit registers. These registers, named Y, Z, W, X, H, L, E, and
A, can either be manipulated individually using 4-bit instructions, or together as register pairs for 8-bit data
manipulation.
The names of the 8-bit register pairs in each register bank are EA, HL, WX, YZ, and WL. Registers A, L, X, and Z
always become the lower nibble when registers are addressed as 8-bit pairs. This makes a total of eight 4-bit
registers or four 8-bit double registers in each of the four working register banks.
ERB Setting
0
1
'x' means don't care.
3
0
0
Table 2-3. Working Register Organization and Addressing
(MSB)
Figure 2-5. Register Pair Configuration
W
Y
H
E
2
0
0
SRB Settings
(LSB)
1
x
0
0
1
1
(MSB)
0
x
0
1
0
1
X
A
Z
L
(LSB)
Selected Register Bank
Always set to bank 0
Bank 0
Bank 1
Bank 2
Bank 3
ADDRESS SPACES
2-11