LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 119

• Manufacturer Part Number: LSI53C875
• Description: PCI to Ultra SCSI I/O Processor
• Manufacturer: LSI Logic

Register: 0x00 (0x80)
SCSI Control Zero (SCNTL0)
Read/Write
ARB1[1:0]
7
1
ARB[1:0]
6
1
1. The LSI53C875 waits for a bus free condition to occur.
2. It asserts SBSY/ and its SCSI ID (contained in the
3. After an arbitration delay, the CPU should read the
4. Once the LSI53C875 wins arbitration, SSEL/ must be
1. The LSI53C875 waits for a bus free condition.
Arbitration Mode Bits 1 and 0
Simple Arbitration
Full Arbitration, Selection/Reselection
ARB1
SCSI Chip ID (SCID)
the SSEL/ signal is asserted by another SCSI device,
the LSI53C875 deasserts SBSY/, deasserts its ID, and
sets the Lost Arbitration bit (bit 3) in the
Zero (SSTAT0)
SCSI Bus Data Lines (SBDL)
higher priority SCSI ID is present. If no higher priority
ID bit is set, and the Lost Arbitration bit is not set, the
LSI53C875 wins arbitration.
asserted using the
for a bus clear plus a bus settle delay (1.2 s) before
a low level selection is performed.
0
0
1
1
START
5
0
ARB0
0
1
0
1
WATN
4
0
Full arbitration, selection/reselection
register.
SCSI Output Control Latch (SOCL)
EPC
3
0
register) onto the SCSI bus. If
Arbitration Mode
Simple arbitration
Reserved
Reserved
register to check if a
R
2
x
AAP
1
0
SCSI Status
TRG
0
0
[7:6]
5-3