LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 136

• Manufacturer Part Number: LSI53C875
• Description: PCI to Ultra SCSI I/O Processor
• Manufacturer: LSI Logic

5-20
software drives this pin low to turn on the LED, or drives it high to turn
off the LED.
SDMS software uses the GPIO[1:0] pins to support serial EEPROM
access. When serial EEPROM access is enabled, GPIO1 is used as a
clock and GPIO0 is used as data.
Register: 0x08 (0x88)
SCSI First Byte Received (SFBR)
Read/Write
This register contains the first byte received in any asynchronous
information transfer phase. For example, when the LSI53C875 is
operating in the initiator mode, this register contains the first byte
received in the Message-In, Status, and Data-In phases.
When a Block Move instruction is executed for a particular phase, the
first byte received is stored in this register, even if the present phase is
the same as the last phase. The first byte received or a particular input
phase is not valid until after a MOVE instruction is executed.
This register is also the accumulator for register read-modify-writes with
the
testing after an operation.
The
therefore not by a Memory Move. The Load instruction may not be used
to write to this register. However, it can be loaded using SCRIPTS
Read/Write operations. To load the
with a byte stored in system memory, the byte must first be moved to an
intermediate LSI53C875 register (such as the SCRATCH register), and
then to the
This register also contains the state of the lower eight bits of the SCSI
data bus during the selection phase if the COM bit in the
(DCNTL)
SCSI Operating Registers
SCSI First Byte Received (SFBR)
7
0
SCSI First Byte Received (SFBR)
register is clear.
SCSI First Byte Received
0
0
0
1B
SCSI First Byte Received (SFBR)
as the destination. This allows bit
is not writable using the CPU, and
(SFBR).
0
0
0
DMA Control
0
0