LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 226
LSI53C875
Manufacturer Part Number
LSI53C875
Description
PCI to Ultra SCSI I/O Processor
Manufacturer
LSI Logic
Datasheet
1.LSI53C875.pdf
(314 pages)
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6-30
SCSIP[2:0]
RA
Instruction Set of the I/O Processor
True/False bit fields. If the comparisons are true, and the
Interrupt-on-the-Fly bit is set (bit 2), the LSI53C875
asserts the Interrupt-on-the-Fly bit.
SCSI Phase
This 3-bit field corresponds to the three SCSI bus phase
signals that are compared with the phase lines latched
when SREQ/ is asserted. Comparisons can be performed
to determine the SCSI phase actually being driven on the
SCSI bus. The following table describes the possible
combinations and their corresponding SCSI phase.
These bits are only valid when the LSI53C875 is
operating in Initiator mode. Clear these bits when the
LSI53C875 is operating in the Target mode.
MSG
0
0
0
0
1
1
1
1
Relative Addressing Mode
When this bit is set, the 24-bit signed value in the
SCRIPTS Pointer Save (DSPS)
relative offset from the current
(DSP)
not the one currently executing). The relative mode does
not apply to Return and Interrupt SCRIPTS.
Jump/Call an Absolute Address
Start execution at the new absolute address.
Jump/Call a Relative Address
Start execution at the current address plus (or minus) the
relative offset.
Command
address (which is pointing to the next instruction,
C/D
0
0
1
1
0
0
1
1
I/O
0
1
0
1
0
1
0
1
Absolute Alternate Address
SCSI Phase
Data-Out
Data-In
Command
Status
Reserved-Out
Reserved-In
Message-Out
Message-In
Condition Codes
DMA SCRIPTS Pointer
register is used as a
[26:24]
DMA
23
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