LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 222

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LSI53C875

Manufacturer Part Number
LSI53C875
Description
PCI to Ultra SCSI I/O Processor
Manufacturer
LSI Logic
Datasheet

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6.5 Transfer Control Instructions
6.5.1 First Dword
6-26
IT[1:0]
OPC[2:0]
Instruction Set of the I/O Processor
Instruction Type -
Transfer Control Instruction
Opcode
This 3-bit field specifies the type of Transfer Control
Instruction to execute. All Transfer Control Instructions
can be conditional. They can be dependent on a
true/false comparison of the ALU Carry bit or a
comparison of the SCSI information transfer phase with
the Phase field, and/or a comparison of the First Byte
Received with the Data Compare field. Each instruction
can operate in Initiator or Target mode.
OPC2
0
0
0
0
1
Jump Instruction
The LSI53C875 can do a true/false comparison of the
ALU carry bit, or compare the phase and/or data as
defined by the Phase Compare, Data Compare and
True/False bit fields.
If the comparisons are true, it loads the
Pointer (DSP)
SCRIPTS Pointer Save (DSPS)
register now contains the address of the next instruction.
If the comparisons are false, the LSI53C875 fetches the
next instruction from the address pointed to by the
SCRIPTS Pointer (DSP)
pointer unchanged.
OPC1
0
0
1
1
x
register with the contents of the
OPC0
0
1
0
1
x
register, leaving the instruction
Instruction Defined
Jump
Call
Return
Interrupt
Reserved
register. The DSP
DMA SCRIPTS
DMA
[31:30]
[29:27]
DMA

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