LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 231
LSI53C875
Manufacturer Part Number
LSI53C875
Description
PCI to Ultra SCSI I/O Processor
Manufacturer
LSI Logic
Datasheet
1.LSI53C875.pdf
(314 pages)
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6.6.2 Second Dword
6.6.3 Third Dword
The SFBR is not writable using the CPU, and therefore not by a Memory
Move. However, it can be loaded using SCRIPTS Read/Write operations.
To load the SFBR with a byte stored in system memory, first move the
byte to an intermediate LSI53C875 register (for example, a SCRATCH
register), and then to the SFBR.
The same address alignment restrictions apply to register access
operations as to normal memory-to-memory transfers.
Memory Move Instructions
DSPS Register
These bits contain the source address of the Memory
Move.
TEMP Register
These bits contain the destination address for the
Memory Move.
Figure 6.6
illustrates the Memory Move instruction.
[31:0]
[31:0]
6-35
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