LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 161

• Manufacturer Part Number: LSI53C875
• Description: PCI to Ultra SCSI I/O Processor
• Manufacturer: LSI Logic

31
0
0
0
0
0
0
0
Register: 0x27 (0xA7)
DMA Command (DCMD)
Read/Write
DCMD
Registers: 0x28–0x2B (0xA8–0xAB)
DMA Next Address (DNAD)
Read/Write
DNAD
0
7
x
0
0
0
0
x
DMA Command
This 8-bit register determines the instruction for the
LSI53C875 to execute. This register has a different
format for each instruction. For complete descriptions,
see
DMA Next Address
This 32-bit register contains the general purpose address
pointer. At the start of some SCRIPTS operations, its
value is copied from the DSPS register. Its value may not
be valid except in certain abort conditions. The default
value of this register is zero.
Do not use this register to determine data addresses
during a Phase Mismatch interrupt, as its value is not
always correct for this use. Use the
(DBC),
Save (DSPS)
and addresses as described in
Paths,”
0
0
Chapter 6, “Instruction Set of the I/O Processor.”
0
x
DMA FIFO
in
DNAD
0
Chapter 2, “Functional Description.”
0
registers to calculate residual byte counts
0
x
0
DCMD
(DFIFO), and
0
0
x
0
0
0
Section 2.5.8.1, “Data
DMA SCRIPTS Pointer
x
0
DMA Byte Counter
0
0
x
0
0
0
[31:0]
0
x
0
[7:0]
5-45
0
0