LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 91
![no-image](/images/no-image-200.jpg)
LSI53C875
Manufacturer Part Number
LSI53C875
Description
PCI to Ultra SCSI I/O Processor
Manufacturer
LSI Logic
Datasheet
1.LSI53C875.pdf
(314 pages)
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PST
DSCL
DSLT
PEN
R
PWS
Register: 0x46
Bridge Support Extensions (PMCSR_BSE)
Read Only
BSE
Configuration Registers
7
0
0
PME Status
The device always returns a zero for this bit, indicating
that PME signal generation is not supported from D3cold.
Data Scale
This device does not support the Data register.
Therefore, this field is always set to 00b.
Data Select
This device does not support the Data register.
Therefore, this field is always set to 0000b.
PME Enable
This device always returns a zero for this bit to indicate
that PME assertion is disabled.
Reserved
Power State
This two bit field determines the current power state for
the function and is used to set the function to a new
power state. The definition of the field values are:
0b00
0b01
0b10
0b11
Bridge Support Extensions
This register applies to the LSI53C875E only and can
support PCI bridge specific functionality, if required. The
default value always returns 0x00.
0
D0
Reserved
Reserved
D3 hot
0
BSE
0
0
0
[14:13]
[12:9]
0
0
[7:2]
[1:0]
[7:0]
3-27
15
8
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