LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 286

• Manufacturer Part Number: LSI53C875
• Description: PCI to Ultra SCSI I/O Processor
• Manufacturer: LSI Logic

7.5 PCI and External Memory Interface Timing
Table 7.19
7-50
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
14s
15s
16s
14f
15f
16f
t
t
t
t
t
t
t
t
t
10
11
12
13
17
18
19
20
21
25
26
1
2
3
4
5
6
7
8
9
Parameter
Shared signal input setup time
Shared signal input hold time
CLK to shared signal output valid
Side signal input setup time
Side signal input hold time
CLK to side signal output valid
CLK high to FETCH/ low
CLK high to FETCH/ high
CLK high to MASTER/ low
CLK high to MASTER/ high
Address setup to MAS/ high
Address hold from MAS/ high
MAS/ pulse width
MCE/ low to data clocked in (fast memory)
MCE/ low to data clocked in (slow memory)
Address valid to data clocked in (fast memory)
Address valid to data clocked in (slow memory)
MOE/ low to data clocked in (fast memory)
MOE/ low to data clocked in (slow memory)
Data hold from address, MOE/, MCE/ change
Next address out from MOE/, MCE/ high
Data setup to CLK high
Data setup to MWE/ low
Data hold from MWE/ high
MCE/ low to MWE/ low
MWE/ high to MCE/ high
LSI53C875 PCI and External Memory Interface Timing
Table 7.19
data.
Instruction Set of the I/O Processor
lists the LSI53C875 PCI and External Memory Interface timing
Min
160
220
205
265
100
160
10
25
15
25
50
30
20
25
25
7
0
–
0
–
–
–
–
–
0
5
Max
11
12
20
20
20
20
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns