LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 23

• Manufacturer Part Number: LSI53C875
• Description: PCI to Ultra SCSI I/O Processor
• Manufacturer: LSI Logic

1.4.6 Reliability
1.4.7 Testability
The following features enhance the reliability of the LSI53C875:
The following features enhance the testability of the LSI53C875:
LSI53C875 Benefits Summary
2 kV ESD protection on SCSI signals.
Typical 300 mV SCSI bus hysteresis.
Protection against bus reflections due to impedance mismatches.
Controlled bus assertion times (reduces RFI, improves reliability, and
eases FCC certification).
Latch-up protection greater than 150 mA.
Voltage feed-through protection (minimum leakage current through
SCSI pads).
A high proportion (> 25%) of pins are power and ground.
Power and ground isolation of I/O pads and internal chip logic.
TolerANT technology which provides:
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JTAG Boundary scan support (LSI53C875J, LSI53C875JB,
LSI53C875N only).
Extended PCI parity checking and generation (LSI53C875N only).
Extended SCSI parity checking.
Access to all SCSI signals through programmed I/O.
SCSI loopback diagnostics.
SCSI bus signal continuity checking.
Support for single step mode operation.
Test mode (AND tree) to check pin continuity to the board (most
package options).
JTAG Boundary scan support (LSI53C875J, LSI53C875JB,
LSI53C875N only).
Active negation of SCSI Data, Parity, Request, and Acknowledge
signals for improved fast SCSI transfer rates.
Input signal filtering on SCSI receivers improves data integrity,
even in noisy cabling environments.
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