LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 234

• Manufacturer Part Number: LSI53C875
• Description: PCI to Ultra SCSI I/O Processor
• Manufacturer: LSI Logic

6.7.1 First Dword
6-38
IT[2:0]
DSA
R
NF
LS
Instruction Set of the I/O Processor
Bit
SIOM (Load)
DIOM (Store)
Note:
This bit has no effect unless the Prefetch Enable bit in the
DMA Control (DCNTL)
SCRIPTS instruction prefetching, see
tional Description.”
Instruction Type
These bits should be 111, indicating the Load and Store
instruction.
DSA Relative
When this bit is cleared, the value in the
Pointer Save (DSPS)
used to perform the Load and Store to/from. When this
bit is set, the chip determines the memory address to per-
form the Load and Store to/from by adding the 24-bit
signed offset value in the
(DSPS)
Reserved
No Flush (Store instruction only)
When this bit is set, the LSI53C875 performs a Store
without flushing the prefetch unit. When this bit is cleared,
the Store instruction automatically flushes the prefetch
unit. Use No Flush if the source and destination are not
within four instructions of the current Store instruction.
This bit has no effect on the Load instruction.
Load/Store
When this bit is set, the instruction is a Load. When
cleared, it is a Store.
Source
Memory
Register
to the
Data Structure Address
is the actual 32-bit memory address
register is set. For information on
Destination
Register
Memory
DMA SCRIPTS Pointer Save
Chapter 2, “Func-
(DSA).
DMA SCRIPTS
[31:29]
[27:26]
28
25
24